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US3676701A
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Shift register
Assignee: US Philips Corp
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Filing: 1971-04-01
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Granted: 1972-07-11
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Expires: 1991-04-01
Abstract
Abstract A shift register comprising a sequence of shift register elements which each include a first and a second transistor the emitters of which are interconnected and have clock pulse signals applied to them. The base of the second transistor and the collector of the first transistor of each of the shift register elements are interconnected. The base of the first transistors of all the shift register elements are connected to a point of reference potential, whilst the collector of second transistor of each of the shift register elements is connected to the collector of the first transistor of the succeeding shift register element.
Inventors
- 👤 Wolfdietrich Geor Kasperkovitz
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-24 12:08
CPC Classifications
G; G11; G11C; G11C19/00; G11C19/28; H; H10; H10D; H10D84/00; H10D84/60; H10D84/611; H10D84/613; H10D84/615; H10D89/00; H10D89/10
Claims Analysis
Total Claims: 6
Claim 1
Independent Claim
104 words
A shift register comprising a sequence of shift register elements each of said elements comprising a first and a second transistor the emitters of which are interconnected, means for applying a clock pulse to these emitters, the base of the second transistor being connected to the collector of the first transistor, means for applying and maintaining an identical fixed direct current reference potential to the base of each first transistor in the register, the collector of the second transistor being connected to the collector of the first transistor of a shift register element succeeding the said shift register element through a substantially non-resistive path.
Claim 2
Dependent Claim
104 words
A shift register comprising a sequence of shift register elements each of said elements comprising a first and a second transistor the emitters of which are interconnected, means for applying a clock pulse to these emitters, the base of the second transistor being connected to the collector of the first transistor, means for applying and maintaining an identical fixed direct current reference potential to the base of each first transistor in the register, the collector of the second transistor being connected to the collector of the first transistor of a shift register element succeeding the said shift register element through a substantially non-resistive path.
Claim 3
Dependent Claim
68 words
A shift register as claimed in claim 1, further comprising a first resistor and a second resistor in each element, wherein the collector of the first transistor of each shift register element has been connected to a point of constant potential via the first resistor, the clock pulse being applied to the emitters of the first and second transistors of each shift register element via the second resistor.
Claim 4
Dependent Claim
25 words
A shift register as claimed in claim 2, wherein the ratio between the second and first resistors is greater than 1.2 and smaller than 2.
Claim 5
Dependent Claim
41 words
A shift register as claimed in claim 1, wherein it contains a semiconductor body which has a plurality of discrete semiconductor areas in which the semiconductor regions of the circuit elements of at least several shift register elements have been accommodated.
Claim 6
Dependent Claim
59 words
A shift register as claimed in claim 4, wherein the discrete semiconductor regions form parts of an epitaxial semiconductor layer of the one conductivity type deposited on a substrate, the first and second resistors of at least one of the shift register elements being epitaxial semiconductor resistances of the one conductivity type which include parts of the epitaxial layer.
References Cited (Backward Citations)
US3297950A
Cited
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1975-07-11 | 1976-01-10 | 1976-07-11 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1979-07-11 | 1980-01-10 | 1980-07-11 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1983-07-11 | 1984-01-10 | 1984-07-11 | $7700.00 | Window Closed / Lapsed |