Patent US3696293A successfully refreshed from Google Patents.
US3696293A
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Pulse-frequency tester
Assignee: Wandel and Golterman GmbH and Co
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Filing: 1970-09-21
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Granted: 1972-10-03
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Expires: 1990-09-21
Abstract
Abstract A train of pulses of unknown repetition frequency, ranging between 2/3 and two times a predetermined cadence, is fed together with the output of the last two stages of a multistage binary counter to a coincidence circuit, the output frequency of the counter equaling the mean cadence of the unknown pulse train. Deviations of the pulse frequency from that cadence beyond predetermined upper and lower tolerance limits, as determined by the coincidence circuit, reset the counter to zero while operating one of two signal lamps to indicate the sign of such deviation. An associated timer may maintain the error-indicating signal lamp operated for a predetermined period and may also cause an automatic resetting of the counter to zero at the end of such period, subject to a restarting of the count by the next pulse of the unknown train.
Inventors
- 👤 Gunther Hoffmann
- 👤 Bernd Zabel
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-25 13:19
CPC Classifications
H; H03; H03J; H03J3/00; H03J3/02; H03J3/12; H03J3/14; H03K; H03K5/00; H03K5/22; H03K5/26
Claims Analysis
Total Claims: 10
Claim 1
Independent Claim
264 words
A system for determining the magnitude of deviations of the repetition frequency of a pulse train within predetermined limits from a fixed cadence, comprising: a source of reference pulses recurring with a basic frequency representing a multiple of said cadence; step-down means supplied by said source including a final binary stage and a preceding binary stage connected in cascade, said final stage having relatively inverted first and second outputs in the form of a square wave with a fundamental frequency equal to said cadence; coincidence means including a first gate connected to receive the first output of said final stage together with said pulse train and a second gate connected to receive the output of said preceding stage together with the second output of said final stage and said pulse train, said first gate generating a first signal upon coincidence of a pulse of said train with a predetermined state of said final stage, said second gate generating a second signal upon coincidence of a pulse of said train with an alternate state of said final stage and a predetermined state of said preceding stage; resetting means connected to said coincidence means for reversing said final stage in response to said first signal and reversing said preceding stage in response to said second signal with modification of the length of a current cycle of said square wave and establishment of a predetermined phase relationship between said square wave and said pulse train; and first and second indicator means connected to said first and second gates for operation by said first and second signals, respectively.
Claim 2
Independent Claim
264 words
A system for determining the magnitude of deviations of the repetition frequency of a pulse train within predetermined limits from a fixed cadence, comprising: a source of reference pulses recurring with a basic frequency representing a multiple of said cadence; step-down means supplied by said source including a final binary stage and a preceding binary stage connected in cascade, said final stage having relatively inverted first and second outputs in the form of a square wave with a fundamental frequency equal to said cadence; coincidence means including a first gate connected to receive the first output of said final stage together with said pulse train and a second gate connected to receive the output of said preceding stage together with the second output of said final stage and said pulse train, said first gate generating a first signal upon coincidence of a pulse of said train with a predetermined state of said final stage, said second gate generating a second signal upon coincidence of a pulse of said train with an alternate state of said final stage and a predetermined state of said preceding stage; resetting means connected to said coincidence means for reversing said final stage in response to said first signal and reversing said preceding stage in response to said second signal with modification of the length of a current cycle of said square wave and establishment of a predetermined phase relationship between said square wave and said pulse train; and first and second indicator means connected to said first and second gates for operation by said first and second signals, respectively.
Claim 3
Dependent Claim
18 words
A system as defined in claim 1 wherein said preceding stage is immediately followed by said final stage.
Claim 4
Dependent Claim
55 words
A system as defined in claim 2 wherein said stepdown means incluDes at least one further binary stage ahead of said preceding stage, said resetting means being connected to said further stage for reversing same upon coincidence of a pulse of said train with at least one predetermined combination of states of all said stages.
Claim 5
Dependent Claim
35 words
A system as defined in claim 1, further comprising timer means connected to said first and second indicator means for maintaining same operated for a predetermined period substantially exceeding a cycle of said square wave.
Claim 6
Dependent Claim
25 words
A system as defined in claim 4 wherein said timer means comprises a monostable circuit connected to be triggered by the pulses of said train.
Claim 7
Dependent Claim
34 words
A system as defined in claim 4 wherein said resetting means is provided with an input circuit connected to said timer means for establishing said predetermined phase relationship at the end of said period.
Claim 8
Dependent Claim
43 words
A system as defined in claim 6 wherein said input circuit includes a bistable element connected to receive said pulse train for maintaining said resetting means effective from the end of said period to the occurrence of the next pulse of said train.
Claim 9
Dependent Claim
37 words
A system as defined in claim 4, further comprising storage means interposed between said gates and said indicator means, said storage means being connected to be reset by said timer means at the end of said period.
Claim 10
Dependent Claim
23 words
A system as defined in claim 1, further comprising integrating means connected to said gates for converting said signals into a continuous output.
References Cited (Backward Citations)
US3354398A
Cited
US3502995A
Cited
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1975-10-03 | 1976-04-03 | 1976-10-03 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1979-10-03 | 1980-04-03 | 1980-10-03 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1983-10-03 | 1984-04-03 | 1984-10-03 | $7700.00 | Window Closed / Lapsed |