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US3699458A Expired / Lapsed US ⏱️ 0.0 years remaining

Jitter free trigger circuit for a sampling oscilloscope

Assignee: Individual
•
Filing: 1971-03-10
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Granted: 1972-10-17
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Expires: 1991-03-10
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Abstract

Abstract In a trigger pulse generator for an oscillator jitter is liable to occur in the trigger pulses because of uncertainties in the timing of the end of the hold-off signal relative to the instants at which a trigger signal reaches a trigger level. Jitter is eliminated by arming an output circuit when the hold-off signal ends and the trigger signal reaches the trigger level. The output circuit generates a trigger pulse, when it is armed, in response to the trigger signal delayed by a predetermined amount.

Inventors

  • 👤 Edward Albert Martin

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-10-29 21:22
CPC Classifications
G; G01; G01R; G01R13/00; G01R13/20; G01R13/22; G01R13/32; H; H03; H03K; H03K3/00; H03K3/02; H03K3/313; H03K3/315

Claims Analysis

Total Claims: 2
Claim 1
Independent Claim 166 words
A trigger pulse generator comprising: a hold-off circuit for providing a hold-off signal of predetermined duration in response to each trigger pulse generated; a two state circuit responsive to the hold-off circuit to become armed at the end of the hold-off signal; means for squaring the trigger signal; means for applying the squared trigger signal to the two state circuit to cause the two state circuit rapidly to switch to a set state when this circuit has become armed; means for delaying the squared trigger signal; and an output gate circuit having first and second inputs, and an output at which an output signal is produced only when both the inputs are simultaneously energized, irrespective of which input became energized first; the first input being connected to be energized by said set state of the two-state circuit, the second input being connected to be energized by the delayed squared trigger signal, and said trigger pulse being derived from said output signal from the output gate circuit.
Claim 2
Dependent Claim 166 words
A trigger pulse generator comprising: a hold-off circuit for providing a hold-off signal of predetermined duration in response to each trigger pulse generated; a two state circuit responsive to the hold-off circuit to become armed at the end of the hold-off signal; means for squaring the trigger signal; means for applying the squared trigger signal to the two state circuit to cause the two state circuit rapidly to switch to a set state when this circuit has become armed; means for delaying the squared trigger signal; and an output gate circuit having first and second inputs, and an output at which an output signal is produced only when both the inputs are simultaneously energized, irrespective of which input became energized first; the first input being connected to be energized by said set state of the two-state circuit, the second input being connected to be energized by the delayed squared trigger signal, and said trigger pulse being derived from said output signal from the output gate circuit.

References Cited (Backward Citations)

US3317743A Cited
US3244989A Cited
US3303359A Cited
US3350576A Cited
US3358159A Cited
US3408580A Cited
US3484624A Cited
US3530315A Cited
US3558930A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1975-10-17 1976-04-17 1976-10-17 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1979-10-17 1980-04-17 1980-10-17 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 1983-10-17 1984-04-17 1984-10-17 $7700.00 Window Closed / Lapsed

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