Patent US3723771A successfully refreshed from Google Patents.
US3723771A
Expired / Lapsed
US
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Frequency to voltage converter
Assignee: Johnson Service Co
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Filing: 1972-02-28
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Granted: 1973-03-27
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Expires: 1992-02-28
Abstract
Abstract A sample-and-hold circuit samples an incoming alternating signal to provide a voltage proportional to input frequency of a sinusoidal signal. A Schmitt trigger circuit and a divide-by-two multivibrator convert the sinusoidal input signal into two square wave signals separated in phase by 180* and each corresponding to the previous full cycle of the input to provide sampling signals to a pair of sample-and-hold circuits. Each sample-and-hold circuit samples the opposite half cycle or period of a corresponding square wave. Transistor means are connected to the corresponding timing circuit to discharge a voltage storage means prior to sampling in response to the start of the sampling half period. Each sample-and-hold circuit includes a transistor selectively charging the voltage storage means from a constant voltage source during the sampling half period to produce a voltage level related to the input frequency which voltage level is held during the non-sampling half period. Analog switches are connected to the circuits and alternately connect each circuit to an output amplifier to apply the hold voltage during the nonsampling half period.
Inventors
- 👤 Lean M Mc
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-01 10:45
CPC Classifications
H; H03; H03D; H03D3/00; H03D3/02; H03D3/04; H03K; H03K9/00; H03K9/06
Claims Analysis
Total Claims: 9
Claim 1
Independent Claim
234 words
A frequency to voltage converter to produce an analog output signal having a magnitude linearly proportional to the frequency of an alternating input signal, comprising a summing means connected to supply an analog output signal proportional to the input voltage, an input means connected to receive an alternating sinusoidal signal and having a first and a second output means to supply first and second alternating square-wave signals of opposite phases and each having a frequency equal to a one-half of the frequency of said sinusoidal signal, a first and a second signal sampling means connected respectively to receive said first and second square wave signals from said input means, each of said signal sampling means having a voltage storage means connected to a voltage source according to the duration of tHe corresponding first half period of said square wave signals and establishing an analog voltage linearly proportional to the corresponding first half period of said respective square wave signal, and first and second analog switch means respectively connected to said first and second signal sampling means and to said summing means and each having a control means connected one each to each of said first and second output means, said analog switch means supplying said analog voltages from said sampling means to said summing means during the second half period of each of said square wave signals and thereby producing said analog output signal.
Claim 2
Dependent Claim
234 words
A frequency to voltage converter to produce an analog output signal having a magnitude linearly proportional to the frequency of an alternating input signal, comprising a summing means connected to supply an analog output signal proportional to the input voltage, an input means connected to receive an alternating sinusoidal signal and having a first and a second output means to supply first and second alternating square-wave signals of opposite phases and each having a frequency equal to a one-half of the frequency of said sinusoidal signal, a first and a second signal sampling means connected respectively to receive said first and second square wave signals from said input means, each of said signal sampling means having a voltage storage means connected to a voltage source according to the duration of tHe corresponding first half period of said square wave signals and establishing an analog voltage linearly proportional to the corresponding first half period of said respective square wave signal, and first and second analog switch means respectively connected to said first and second signal sampling means and to said summing means and each having a control means connected one each to each of said first and second output means, said analog switch means supplying said analog voltages from said sampling means to said summing means during the second half period of each of said square wave signals and thereby producing said analog output signal.
Claim 3
Dependent Claim
157 words
The frequency to voltage converter of claim 1, wherein each of said sampling means includes, a constant voltage source means, capacitive storage means, sampling switch means connected to said source means and to said storage means and selectively establishing a discharging circuit to set the storage means to a common reference charging potential and a charging circuit for charging said storage means from said source means, and timing and switching means connected to input means to receive said square wave signal and connected to actuate said sampling switch means to simultaneously establish said charging and discharging circuits in response to the start of a charging period and having means to rapidly open said discharging circuit after a selected short time period and thereby charging said storage means from said constant voltage source for a predetermined portion of the period of said periodic signal, and said analog switch means connecting said capacitive storage means to said summing means.
Claim 4
Dependent Claim
116 words
The circuit of claim 2, wherein said switch means includes a first level responsive switch means connected in said charging circuit and a second level responsive switch means connected in said discharging circuit, said second switch means being connected across said capacitive storage means to selectively remove all voltage from said voltage storage means prior to charging, and a third level switch means having an input connected to said input means and connected to selectively energize said second switch means and including a capacitive timing means responsive to conduction of said third switch means to terminate conduction of said second switch means and permit said capacitive storage means to be charged through said first switch means.
Claim 5
Dependent Claim
36 words
The frequency to voltage converter of claim 1, wherein said input means includes a level responsive triggered circuit responsive to a selected polarity and connected to a bistable multivibrator including said first and second output means.
Claim 6
Dependent Claim
64 words
The frequency to voltage converter of claim 1, wherein each of said analog switch means includes a field effect transistor having an output circuit means connecting the storage means of the corresponding signal sampling means to said summing means and said control means including a transistor connected to the gate of the field effect transistor, said transistor having an input to said output means.
Claim 7
Dependent Claim
155 words
The frequency to voltage converter of claim 1, wherein said input means includes a bistable multivibrator having a pair of oppositely poled output means defining said first and second output means, each of said sampling means includes a first transistor connected in series with said capacitive storage means and a constant voltage source to define said charging circuit, said transistor having an input circuit connected to an output means of said multivibrator circuit, a second transistor having an output circuit connected across said storage means and having an input circuit and a capacitive timing means connected in said input circuit, a third transistor having an input circuit connected in common with the input circuit of said first transistor to said multivibrator and having an input circuit connected in series with the input circuit of said second transistor, said square wave signal biasing said first and third transiStors on and off according to the signal level.
Claim 8
Dependent Claim
95 words
The circuit of claim 6, wherein said capacitive timing means includes a resistor connected to said voltage source and to the input circuit of said second transistor and a timing capacitor connected in series between the output circuit of said third transistor and the input circuit of said second transistor, said timing capacitor being charged and biasing said second transistor off after removing all charge from said storage capacitor, and a means connected in parallel with said resistor and said timing capacitor to discharge said capacitor in response to turn off of said third transistor.
Claim 9
Dependent Claim
102 words
The frequency to voltage converter of claim 6, wherein each of said analog switch means includes a field effect transistor having an output circuit means connected between the capacitive storage means and the summing means, said output circuit having a long time constant to transfer and hold the voltage at said storage means, said field effect transistor having a gate connected in a gate circuit including means to bias said gate on, a fourth transistor connected to effectively turn off said gate circuit and having an input means connected to the same output means of the multivibrator as the corresponding first transistor.
References Cited (Backward Citations)
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1976-03-26 | 1976-09-25 | 1977-03-27 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1980-03-26 | 1980-09-25 | 1981-03-27 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1984-03-26 | 1984-09-25 | 1985-03-27 | $7700.00 | Window Closed / Lapsed |