Circuit for establishing correct hue setting in color television using virs signal

Claim 1

In a color television receiver having means for receiving and demodulating color television signals including sync pulse information, luminance information, suppressed subcarrier chrominance information, color burst information and a VIR component, said VIR component containing chrominance reference information and occurring on line 20 during the vertical retrace interval; oscillator means regenerating the chrominance subcarrier under frequency control of said color burst; color signal demodulating means developing color difference signals from said regenerated subcarrier and said chrominance information, said color signal demodulating means producing a known output when the phase of said regenerated subcarrier and said chrominance reference are identical; signal generating means for producing a signal equivalent to said known output; hue control means for adjusting the relative phase between said regenerated subcarrier and said chrominance information; comparison means including a pair of transistors arranged as a differential amplifier for comparing the output of said color signal demodulating means with said known ouput from said signal generating means and producing a signal representative of phase discrepancies between said chrominance reference and said regenerated subcarrier to enable corrective adjustments of said hue control means; sync pulse sepaRating means; and line selector means energizing said differential amplifier in said comparison means during occurrence of said VIR component; said line selector means comprising: means for counting 20 sync pulses, including sync pulse integrator means coupled to said sync pulse separating means, a flip flop, a source of horizontal flyback pulses and a normally disabled binary counter coupled to count said horizontal flyback pulses; said sync pulse integrator means triggering said flip flop upon receipt of six sync pulses in the first equalizing pulse interval and the vertical sync interval during said vertical retrace interval in response to an output of said flip flop and initiating counting in said binary counter; said binary counter including logic means for producing an energizing pulse output in response to said counter achieving a count of 14 corresponding to receipt of 14 additional sync pulses to render the differential amplifier in said comparsion means operational; said line selector means further including a switching transistor coupled between said logic element and said differential amplifier, and arranged to control the conductivity of said differential amplifier; and means including a resistor and a capacitor, coupled to said binary counter and responsive to said binary counter attaining said count of 14 for generating a pulse for resetting said flip flop to its initial state.