Patent US3872291A successfully refreshed from Google Patents.
US3872291A
Expired / Lapsed
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Field repairable memory subsystem
Assignee: Bull HN Information Systems Italia SpA
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Filing: 1974-03-26
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Granted: 1975-03-18
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Expires: 1994-03-26
Abstract
Abstract A block-addressable mass memory subsystem comprising wafer-sized modules of LSI semiconductor basic circuits is disclosed. The basic circuits are interconnected on the wafer by non-unique wiring bus portions formed in a universal pattern as part of each basic circuit. A disconnect line is provided as part of the interconnecting bus. A variable address storage register is provided for each basic circuit. An inhibit chain interconnects all the basic circuits, whereby one and only one basic circuit is responsive to store a unique address in its address storage register. Basic circuits, discovered to be defective in the field through error detection and correction techniques, may be disconnected from the memory subsystem by maintenance personnel through the transmission of a disconnect signal over the disconnect line to the defective basic circuit. Disconnected basic circuits are automatically functionally eliminated from the memory subsystem, since the inhibit chain links only good basic circuits.
Inventors
- 👤 Ii John Carpenter Hunter
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-23 21:57
CPC Classifications
G; G11; G11C; G11C29/00; G11C29/70; G11C29/78; G06; G06F; G06F12/00; G06F12/02; G06F12/06; G06F12/0646; G06F12/0653; G06F12/0661; G11C29/83; G11C29/832
Claims Analysis
Total Claims: 10
Claim 1
Independent Claim
310 words
A repairable store having connected thereto, from an external source, means for transmitting an address signal, means for transmitting a data signal, means for transmitting control signals, means for transmitting a disconnect signal, and adapted to receive address and control signals from said external source and to transfer data signals to and from said external source, said store comprising a plurality of basic units of store, each one of said basic units comprising: a bus portion including at least one address signal line, a data signal line, a control signal line, and a disconnect signal line, said bus portion interconnecting said plurality of basic units; a first means for storing said data signals; a second means for storing an address; third means connected to said control signal line and responsive to one of said control signals for storing at least one status signal; means responsive to said third storage means for selectively enabling said second storage means to store a unique address transmitted over said address signal line; means for controlling the transfer of data signals between said data signal line and said first storage means; first comparison means responsive to a comparison between address signals received over said at least one address signal line and said stored address for generating a match signal; second comparison means responsive to said match signal and a different one of said control signals for actuating said controlling means; second means for connecting said at least one address signal line to said first comparison means, for connecting said data signal line to said first storage means, and for connecting said control signal line to said third storage means and said second comparison means; and means for disabling said second connecting means in response to said disconnect signal and sAid match signal to thereby disconnect said one basic unit of store from said signal bus.
Claim 2
Dependent Claim
310 words
A repairable store having connected thereto, from an external source, means for transmitting an address signal, means for transmitting a data signal, means for transmitting control signals, means for transmitting a disconnect signal, and adapted to receive address and control signals from said external source and to transfer data signals to and from said external source, said store comprising a plurality of basic units of store, each one of said basic units comprising: a bus portion including at least one address signal line, a data signal line, a control signal line, and a disconnect signal line, said bus portion interconnecting said plurality of basic units; a first means for storing said data signals; a second means for storing an address; third means connected to said control signal line and responsive to one of said control signals for storing at least one status signal; means responsive to said third storage means for selectively enabling said second storage means to store a unique address transmitted over said address signal line; means for controlling the transfer of data signals between said data signal line and said first storage means; first comparison means responsive to a comparison between address signals received over said at least one address signal line and said stored address for generating a match signal; second comparison means responsive to said match signal and a different one of said control signals for actuating said controlling means; second means for connecting said at least one address signal line to said first comparison means, for connecting said data signal line to said first storage means, and for connecting said control signal line to said third storage means and said second comparison means; and means for disabling said second connecting means in response to said disconnect signal and sAid match signal to thereby disconnect said one basic unit of store from said signal bus.
Claim 3
Dependent Claim
15 words
The repairable store of claim 1, wherein said disabling means comprises a semipermanent voltage-programmable transistor.
Claim 4
Dependent Claim
15 words
The repairable store of claim 1, wherein said disabling means comprises a programmable connective device.
Claim 5
Dependent Claim
122 words
The repairable store according to claim 1, wherein the number of said plurality of basic units of store is at least as great as the address space of said store and wherein said repairable store further comprises: means for transmitting said at least one status signal stored within said third means over said control signal line to each of said basic units which is connected to said store; and means associated with said store for enabling one and only one of said third means of said connected basic units to be responsive to said transmitted status signal at any given time, whereby a unique address from the store address space may be assigned to each of said plurality of connected basic units.
Claim 6
Dependent Claim
421 words
A repairable store having connected thereto, from an external source, means for transmitting an address signal, means for transmitting a data signal, means for transmitting control signals, and means for transmitting a disconnect signal, and adapted to receive address and control signals from said external source and to transfer data signals to and from said external source, said store comprising a plurality of basic units of store each one of said basic units of store comprising: a bus portion including a plurality of address and control signal lines, a data signal line, and a disconnect signal line, said bus portion interconnecting said plurality of basic units; switching means; first means for storing said data signals; second means for storing an address; third means for storing a status signal, said third means including enabling means responsive to said status signal for selectively enabling said second storage means to store a unique address transmitted over said address signal lines; fourth means for selectively inhibiting the operation of said enabling means, said fourth means being responsive to the contents of said third means and to an inhibit control signal transmitted over a predetermined one of said control signal lines; fifth means, associated with said predetermined control signal line, for ordering said one basic unit relative to the other basic units of said store, said fifth means being responsive to the contents of all of said third means of the basic units of higher order than said one basic unit to selectively generate said inhibit control signal over said predetermined control signal line to the basic units of lower order; means for comparing said address signals with the contents of said second storage means, said comparing means being responsive to a coincidence between said address signals and said unique stored address to generate a control enable signal; sixth means connected to said first storage means and responsive to said control enable signal and to data control signals transmitted over predetermined others of said control signal lines to control the transfer of said data signals between said data signal line and said first storage means; second means for connecting via said switching means said address signals to said second storage means and said comparing means, said control signals to said fourth, fifth, and sixth means, and said data signal line to said first storage means; and means for disabling said switching means in response to said disconnect signal and said control enable signal to thereby disconnect said one basic unit of store from said signal bus.
Claim 7
Dependent Claim
421 words
A repairable store having connected thereto, from an external source, means for transmitting an address signal, means for transmitting a data signal, means for transmitting control signals, and means for transmitting a disconnect signal, and adapted to receive address and control signals from said external source and to transfer data signals to and from said external source, said store comprising a plurality of basic units of store each one of said basic units of store comprising: a bus portion including a plurality of address and control signal lines, a data signal line, and a disconnect signal line, said bus portion interconnecting said plurality of basic units; switching means; first means for storing said data signals; second means for storing an address; third means for storing a status signal, said third means including enabling means responsive to said status signal for selectively enabling said second storage means to store a unique address transmitted over said address signal lines; fourth means for selectively inhibiting the operation of said enabling means, said fourth means being responsive to the contents of said third means and to an inhibit control signal transmitted over a predetermined one of said control signal lines; fifth means, associated with said predetermined control signal line, for ordering said one basic unit relative to the other basic units of said store, said fifth means being responsive to the contents of all of said third means of the basic units of higher order than said one basic unit to selectively generate said inhibit control signal over said predetermined control signal line to the basic units of lower order; means for comparing said address signals with the contents of said second storage means, said comparing means being responsive to a coincidence between said address signals and said unique stored address to generate a control enable signal; sixth means connected to said first storage means and responsive to said control enable signal and to data control signals transmitted over predetermined others of said control signal lines to control the transfer of said data signals between said data signal line and said first storage means; second means for connecting via said switching means said address signals to said second storage means and said comparing means, said control signals to said fourth, fifth, and sixth means, and said data signal line to said first storage means; and means for disabling said switching means in response to said disconnect signal and said control enable signal to thereby disconnect said one basic unit of store from said signal bus.
Claim 8
Dependent Claim
16 words
An integrated-circuit store according to claim 5 wherein said disabling means comprises a programmable connective device.
Claim 9
Dependent Claim
16 words
An integrated-circuit store according to claim 5 wherein said disabling means comprises a semipermanent voltage-programmable transistor.
Claim 10
Dependent Claim
16 words
An integrated-ciRcuit store according to claim 5 wherein said disabling means comprises a programmable connective device.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1978-03-17 | 1978-09-16 | 1979-03-18 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1982-03-17 | 1982-09-16 | 1983-03-18 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1986-03-17 | 1986-09-16 | 1987-03-18 | $7700.00 | Window Closed / Lapsed |