Drive circuit for a liquid crystal display

Claim 2

In a display including a plurality of display cells, each of the type actuatable by a potential applied across display material between a pair of electrodes and wherein said cells are arranged in M groups of N cells, a driving circuit for multiplexing the cells comprising: a source of chopped DC actuating potential; capacitive means for each of said cells; a transistor for each of said cells, each of said transistors having a base terminal, an emitter terminal and a collector terminal, said collector terminal connected in series with said capacitive means and said source of chopped DC potentIal, wherein the collector terminal of each transistor is connected to its associated capacitive means and wherein each transistor enables current flow in one direction between the emitter and collector thereof in response to simultaneous pulses applied to said base and emitter thereof; a set of M selectively actuatable driving circuits each connected to the base of the transistor of each cell of the corresponding group for applying base-emitter junction saturating pulses to the transistors of the cell of at least one of the M groups; and a set of N sequentially actuatable driving circuits each connected to the emitter of one transistor in each of the M groups for sequentially applying base-emitter junction enabling pulses to the successive sets of transistors connected thereto for enabling the selective actuation of said set of M driving circuits to saturate said base emitter junction of said successive groups of transistors and for preventing the saturation by said M driving circuits of the base-emitter junction of the transistors of the others of said groups.

Claim 3

A display according to claim 1 wherein said capacitive means for each of said cells includes a layer of dielectric material deposited over one of said electrodes.

Claim 4

A display, according to claim 1 wherein said transistor for each of said cells comprises a bipolar transistor, said cell and corresponding capacitive means being connected in the collector of said bipolar transistor.

Claim 5

The display of claim 1 wherein said display material includes a dynamic scattering type of liquid crystal material and wherein the multiplex driving circuit operates in an element-at-a-time mode, the frequency of the base-emitter junction saturating pulses selectively applied to the transistors by each of said M selectively actuable driving circuits being equal to at least 10 times the frequency of said chopped DC actuating potential divided by the duty cycle of the display.

Claim 6

The display of claim 3 wherein each of said M selectively actuable driving circuits applies a set of N pulses to the transistors connected thereto in synchronism with the sequential application of a set of N enabling pulses to the successive of transistors connected to each of said M selectively actuatable driving circuits by said set of N sequentially actuatable driving circuits, said set of M driving circuits operating sequentially to selectively apply sets of N pulses to the transistors connected to the successive groups of N cells.

Claim 7

The display of claim 5 wherein said display material includes dynamic scattering type liquid crystal material and wherein said set of pulses generated by each of said M selectively actuatable driving circuits have a frequency of at least 10 times the frequency of said chopped DC actuating potential divided by the duty cycle of the display.

Claim 8

The display of claim 3 wherein said set of M selectively actuatable driving circuits are synchronized with one another and with said set of N sequentially actuable driving circuits for selectively actuating in parallel the successive sets of corresponding cells of each of the M groups of cells.

Claim 9

The display of claim 7 wherein said display material includes dynamic scattering type liquid crystal material and wherein the frequency of the pulses applied by said set of M selectively actuatable driving circuits and said sets of said sets of N sequentially actuatable driving circuits is equal to at least 10 times the frequency of said chopped DC actuating potential divided by N times the duty cycle of the display.

Claim 10

The display of claim 1 wherein said electrodes are disposed opposite one another on either side of said portion of a layer of display material and wherein said capacitive means includes a layer of dielectric material deposited over one of said electrodes.

Claim 11

In a display including a plurality of display cells, each of the type actuatable by a potential applied across display mAterial between a pair of electrodes and wherein said cells are arranged in M groups of N cells, a driving circuit for multiplexing the cells comprising: a source of chopped DC actuating potential; a capacitive means for each of said cells; transistor means for each of said cells, each of said transistor means having a pair of current carrying terminals, one terminal of said pair of terminals connected in series with its associated capacitive means and said source of chopped DC potential with said one terminal connected to the capacitive means, a third terminal for controlling the current at said pair of terminals, and wherein the application of a voltage in a predetermined range to said third terminal prevents current flow in one direction through said pair of terminals; a set of M selectively actuatable driving circuits connected to the transistor means of the cells of the corresponding M groups for selectively applying actuating pulses to said third terminal of the transistor means of the cells of the corresponding groups; and a set of N sequentially actuatable driving circuits connected to the transistor means of the corresponding cells of each of the M groups for sequentially applying enabling pulses to the successive sets of transistor means connected thereto for enabling the selective actuation of said set of M driving circuits to selectively apply a voltage outside of said predetermined range to said third terminals of said successive groups of transistor means for rendering said transistors impulsively conductive and for holding the voltage at the third terminal of the others of said transistor means within said predetermined range.

Claim 12

In a display including a plurality of display cells, each of the type actuatable by a potential applied across display mAterial between a pair of electrodes and wherein said cells are arranged in M groups of N cells, a driving circuit for multiplexing the cells comprising: a source of chopped DC actuating potential; a capacitive means for each of said cells; transistor means for each of said cells, each of said transistor means having a pair of current carrying terminals, one terminal of said pair of terminals connected in series with its associated capacitive means and said source of chopped DC potential with said one terminal connected to the capacitive means, a third terminal for controlling the current at said pair of terminals, and wherein the application of a voltage in a predetermined range to said third terminal prevents current flow in one direction through said pair of terminals; a set of M selectively actuatable driving circuits connected to the transistor means of the cells of the corresponding M groups for selectively applying actuating pulses to said third terminal of the transistor means of the cells of the corresponding groups; and a set of N sequentially actuatable driving circuits connected to the transistor means of the corresponding cells of each of the M groups for sequentially applying enabling pulses to the successive sets of transistor means connected thereto for enabling the selective actuation of said set of M driving circuits to selectively apply a voltage outside of said predetermined range to said third terminals of said successive groups of transistor means for rendering said transistors impulsively conductive and for holding the voltage at the third terminal of the others of said transistor means within said predetermined range.

Claim 13

The display of claim 10 wherein said transistor means comprises a bipolar transistor.

Claim 14

A circuit for driving a display cell of the type having display material between a pair of electrodes and actuatable by a potential thereacross during use, the circuit comprising: a. first means for developing a first chopped DC actuating potential signal; b. capacitive means associated with the display cell and connected in series with said first means; c. transistor means having a pair of current carrying terminals, one of said pair of terminals connected in series with said first means and said capacitive means with said one terminal connected to said capacitive means, a third terminal and said transistor means responsive to the simultaneous application of switching signals at the other of said pair of terminals and the third terminal for enabling current flow in one direction through said pair of current carrying terminals; d. second means for applying a second switching signal to said third terminal; and e. third means for selectively applying a third switching signal to said other terminal simultaneously with the application of said second signal to said third terminal.

Claim 15

A circuit for driving a display cell of the type having display material between a pair of electrodes and actuatable by a potential thereacross during use, the circuit comprising: a. first means for developing a first chopped DC actuating potential signal; b. capacitive means associated with the display cell and connected in series with said first means; c. transistor means having a pair of current carrying terminals, one of said pair of terminals connected in series with said first means and said capacitive means with said one terminal connected to said capacitive means, a third terminal and said transistor means responsive to the simultaneous application of switching signals at the other of said pair of terminals and the third terminal for enabling current flow in one direction through said pair of current carrying terminals; d. second means for applying a second switching signal to said third terminal; and e. third means for selectively applying a third switching signal to said other terminal simultaneously with the application of said second signal to said third terminal.

Claim 16

A circuit according to claim 12, wherein said transistor means comprises a bipolar transistor.

Claim 17

A circuit for driving a plurality display cells disposed in M groups of N cells, each cell of the type having display material between a pair of electrodes and actuatable by a potential thereacross driving use, the circuit comprising: a. first means for developing a first chopped DC actuating potential signal; b. a plurality of capacitive means, each associated with one of the cells; c. a plurality of transistor means, each associated with one cell and each having a pair of current carrying terminal, one terminal of said pair of terminals connected in series with said first means and the corresponding one of said capacitive means with said one terminal connected to said corresponding capacitive means, a third terminal and each transistor means responsive to the simultaneous application of switching signals at the other of said pair of terminals and the third terminal for enabling current flow in one direction through said the pair of current carrying terminals; d. a Set of M second means each for selectively applying a second switching signal to the third terminal of one group of N transistor means; and e. a set of N third means for sequentially applying third switching signals to successive groups of M other terminals simultaneously with the application of at least one second signal to the third terminal of one group of N transistor means, whereby successive groups of at least one transistor means are enabled to permit current flow in one direction through the current carrying terminals to drive a corresponding display cell.

Claim 18

A circuit for driving a plurality display cells disposed in M groups of N cells, each cell of the type having display material between a pair of electrodes and actuatable by a potential thereacross driving use, the circuit comprising: a. first means for developing a first chopped DC actuating potential signal; b. a plurality of capacitive means, each associated with one of the cells; c. a plurality of transistor means, each associated with one cell and each having a pair of current carrying terminal, one terminal of said pair of terminals connected in series with said first means and the corresponding one of said capacitive means with said one terminal connected to said corresponding capacitive means, a third terminal and each transistor means responsive to the simultaneous application of switching signals at the other of said pair of terminals and the third terminal for enabling current flow in one direction through said the pair of current carrying terminals; d. a Set of M second means each for selectively applying a second switching signal to the third terminal of one group of N transistor means; and e. a set of N third means for sequentially applying third switching signals to successive groups of M other terminals simultaneously with the application of at least one second signal to the third terminal of one group of N transistor means, whereby successive groups of at least one transistor means are enabled to permit current flow in one direction through the current carrying terminals to drive a corresponding display cell.

Claim 19

A circuit according to claim 14, wherein each of said transistor means comprises a bipolar transistor.

Claim 20

A circuit according to claim 15, wherein each of said capacitive means includes a layer of dielectric material deposited over one of the electrodes of one cell.