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US3988759A Expired / Lapsed US ⏱️ 0.0 years remaining

Thermally balanced PN junction

Assignee: RCA Corp
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Filing: 1974-08-26
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Granted: 1976-10-26
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Expires: 1994-08-26
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Abstract

Abstract Regions of high resistivity, with respect to the surrounding material, are designed into a semiconductor device at points where hot-spots have been observed. A device made in this manner has very good second breakdown characteristics. One application is in large area junction transistors having an interdigitated base-emitter configuration.

Inventors

  • 👤 Richard Denning
  • 👤 Willem Gerard Einthoven

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-11-03 12:49
CPC Classifications
H; H10; H10D; H10D84/00; H10D84/60; H10D84/611; H10D84/613; H10D84/615; H10D99/00; H10P; H10P74/00; H10P74/20; H10P74/207

Claims Analysis

Total Claims: 6
Claim 1
Independent Claim 205 words
A semiconductor device comprising; a semiconductor wafer having upper and lower segments of one type conductivity and a layer of a semiconductor material having a second type conductivity, and forming a first PN junction with said upper segment, a first portion of said layer having said second type conductivity and having a higher carrier concentration than the remainder of said layer, said first portion at least partially laterally surrounding a first plurality of regions located at empirically determined preselected positions which, but for said plurality of regions, would be positions of relatively high current density in said layer, said first plurality of regions being comparatively undoped regions of said layer extending through said first portion, a second portion of said layer having said one type conductivity and being within said first portion and forming a second PN junction, therewith, a first electrode formed on, and in electrical contact with, said lower segment of said wafer, a second electrode overlying and making electrical contact to said second portion, and a third electrode overlying and making electrical contact to a part of said first portion, positioned such that said first plurality of regions are in the electrical path from said third electrode to said second PN junction.
Claim 2
Dependent Claim 205 words
A semiconductor device comprising; a semiconductor wafer having upper and lower segments of one type conductivity and a layer of a semiconductor material having a second type conductivity, and forming a first PN junction with said upper segment, a first portion of said layer having said second type conductivity and having a higher carrier concentration than the remainder of said layer, said first portion at least partially laterally surrounding a first plurality of regions located at empirically determined preselected positions which, but for said plurality of regions, would be positions of relatively high current density in said layer, said first plurality of regions being comparatively undoped regions of said layer extending through said first portion, a second portion of said layer having said one type conductivity and being within said first portion and forming a second PN junction, therewith, a first electrode formed on, and in electrical contact with, said lower segment of said wafer, a second electrode overlying and making electrical contact to said second portion, and a third electrode overlying and making electrical contact to a part of said first portion, positioned such that said first plurality of regions are in the electrical path from said third electrode to said second PN junction.
Claim 3
Dependent Claim 59 words
A semiconductor device as described in claim 1 wherein: said semiconductor device is a junction transistor and, said wafer constitutes the collector portion, said first portion constitutes the base portion, said second portion constitutes the emitter portion, said first electrode is the collector electrode, said second electrode is the emitter electrode and, said third electrode is the base electrode.
Claim 4
Dependent Claim 42 words
A semiconductor device as claimed in claim 1 wherein: said higher carrier concentration of said first portion is on the order of magnitude of about 10 2 atoms/cm 3 to about 10 5 atoms/cm 3 larger than the concentration in said layer.
Claim 5
Dependent Claim 22 words
A semiconductor device as claimed in claim 1 wherein: said regions have sheets resistance from about 200 Ω/□ to about 20,000 Ω/□.
Claim 6
Dependent Claim 56 words
A semiconductor device as claimed in claim 1 wherein said second portion further comprises: a second plurality of regions at least partially surrounded by said second portion located at empirically determined preselected positions of relatively high current density, said second plurality of regions being comprised of material of said first portion extending through said second portion.

References Cited (Backward Citations)

US3500143A Cited
US3667008A Cited
US3740621A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1979-10-26 1980-04-26 1980-10-26 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1983-10-26 1984-04-26 1984-10-26 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 1987-10-26 1988-04-26 1988-10-26 $7700.00 Window Closed / Lapsed

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