Patent US3996479A successfully refreshed from Google Patents.
US3996479A
Expired / Lapsed
US
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Comparator/bistable circuit
Assignee: Westinghouse Electric Corp
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Filing: 1975-07-03
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Granted: 1976-12-07
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Expires: 1995-07-03
Abstract
Abstract In a comparator/bistable circuit, wherein the bistable circuit is tripped in response to a predetermined relationship between first and second inputs supplied to a comparator circuit, one of the inputs to the comparator circuit is supplied as an input to an adjustable reset circuit which develops the bistable reset level as a percentage function of one of the comparator input signals. This contrasts with the conventional technique of developing the bistable reset level as a feedback function of the output of the bistable circuit.
Inventors
- 👤 Johannes J. Schmitz
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-07 21:37
CPC Classifications
H; H03; H03K; H03K3/00; H03K3/02; H03K3/023; H03K3/0233; H03K3/02337; G; G01; G01R; G01R19/00; G01R19/10; G01R19/165; G01R19/16566; G01R19/16576
Claims Analysis
Total Claims: 10
Claim 1
Independent Claim
149 words
The combination of, a comparator circuit means for comparing first and second input signals and generating a trip signal at an output in response to a predetermined relationship between said input signals, a bistable circuit means having a trip and reset state and an input connected to the output of said comparator circuit means, said trip signal establishing said bistable circuiting trip state, and a reset circuit means having an input and an output, one of said input signals to said comparator circuit means being supplied to the input of said reset circuit means, the output of said reset circuit means being coupled to the input of said bistable circuit means, said reset circuit means responding to the trip state of bistable circuit means by supplying a reset signal to said bistable circuit means which is a predetermined portion of said input signal supplied to said reset circuit means.
Claim 2
Dependent Claim
149 words
The combination of, a comparator circuit means for comparing first and second input signals and generating a trip signal at an output in response to a predetermined relationship between said input signals, a bistable circuit means having a trip and reset state and an input connected to the output of said comparator circuit means, said trip signal establishing said bistable circuiting trip state, and a reset circuit means having an input and an output, one of said input signals to said comparator circuit means being supplied to the input of said reset circuit means, the output of said reset circuit means being coupled to the input of said bistable circuit means, said reset circuit means responding to the trip state of bistable circuit means by supplying a reset signal to said bistable circuit means which is a predetermined portion of said input signal supplied to said reset circuit means.
Claim 3
Dependent Claim
38 words
The combination of claim 1 wherein said reset circuit means includes a signal attenuating means to develop said reset signal having a magnitude in a range of about 10% to 99% of the magnitude of said input signal.
Claim 4
Dependent Claim
36 words
The combination of claim 1 wherein at least one of said first and second input signals is a variable input signal, said variable input signal being supplied as said input signal to said reset circuit means.
Claim 5
Dependent Claim
26 words
The combination of claim 2 wherein said signal attenuating means includes a variable resistor to select a percentage of said input signal as said reset signal.
Claim 6
Dependent Claim
201 words
The combination of, a comparator circuit means for comparing first and second input signals and generating a trip signal at an output in response to a predetermined relationship between said input signals, a bistable circuit means having a trip and reset state and an input connected to the output of said comparator circuit means, said trip signal establishing said bistable circuit trip state, and a reset circuit means having an input and an output, one of said input signals to said comparator circuit means being supplied to the input of said reset circuit means, the output of said reset circuit means being coupled to the input of said bistable circuit means, said reset circuit means responding to the trip state of said bistable circuit means by supplying a reset signal to said bistable circuit means which is a predetermined portion of said input signal supplied to said reset circuit means, said reset circuit means including a signal conditioning means to develop said reset signal having a magnitude which is a function of the magnitude of said input signal and switch means responsive to said trip state of said bistable circuit means by supplying said reset signal to said bistable circuit means.
Claim 7
Dependent Claim
201 words
The combination of, a comparator circuit means for comparing first and second input signals and generating a trip signal at an output in response to a predetermined relationship between said input signals, a bistable circuit means having a trip and reset state and an input connected to the output of said comparator circuit means, said trip signal establishing said bistable circuit trip state, and a reset circuit means having an input and an output, one of said input signals to said comparator circuit means being supplied to the input of said reset circuit means, the output of said reset circuit means being coupled to the input of said bistable circuit means, said reset circuit means responding to the trip state of said bistable circuit means by supplying a reset signal to said bistable circuit means which is a predetermined portion of said input signal supplied to said reset circuit means, said reset circuit means including a signal conditioning means to develop said reset signal having a magnitude which is a function of the magnitude of said input signal and switch means responsive to said trip state of said bistable circuit means by supplying said reset signal to said bistable circuit means.
Claim 8
Dependent Claim
14 words
The combination of claim 5 wherein said switch means is a field effect transistor.
Claim 9
Dependent Claim
18 words
The combination of claim 1 further including a bias control circuit means connected to said comparator circuit means.
Claim 10
Dependent Claim
32 words
The combination of claim 1 wherein said reset circuit means includes electrical isolation means to electrically isolate the input of said comparator circuit means from the output of said reset circuit means.
References Cited (Backward Citations)
US3531726A
Cited
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1979-12-07 | 1980-06-07 | 1980-12-07 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1983-12-07 | 1984-06-07 | 1984-12-07 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1987-12-07 | 1988-06-07 | 1988-12-07 | $7700.00 | Window Closed / Lapsed |