Patent US4040721A successfully refreshed from Google Patents.
US4040721A
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Driver circuit for liquid crystal display
Assignee: Omron Corp
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Filing: 1975-07-14
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Granted: 1977-08-09
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Expires: 1995-07-14
Abstract
Abstract A driver circuit connected to digit and segment electrodes on a liquid crystal display for providing saturating display voltages therebetween for "on" selected segments and sub-threshold voltages therebetween for "off" selected segments. Saturating voltages are obtained by applying an enabling signal to a digit electrode and an actuating signal to a segment electrode in a digit simultaneously. Sub-threshold voltages are obtained by applying quiescent signals to one or both digit and segment electrodes in the digit. An AC signal controllable in amplitude and frequency is utilized as the actuating signal applied to the selected segment electrode. Means are provided in the driving circuit for an initial adjustment of digit enabling and quiescent voltages as well as segment quiescent and actuating voltages.
Inventors
- 👤 Masakatsu Kurita
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-23 21:11
CPC Classifications
G; G09; G09G; G09G3/00; G09G3/04; G09G3/16; G09G3/18
Claims Analysis
Total Claims: 17
Claim 1
Independent Claim
372 words
A driver circuit for receiving decoded segment and digit drive signals for determining application of electrical potential between predetermined segment and digit electrodes having liquid crystal material disposed therebetween to thereby form a liquid crystal display, said liquid crystal material operating to provide maximum contrast between areas underlying energized segment electrodes and surrounding areas when RMS voltage between segment and digit electrodes is at or above a saturating voltage and no contrast between such areas when RMS voltage therebetween is below a threshold voltage, said liquid crystal display having an upper cut-off frequency related to display capacitive characteristic, comprising a digit driver for each digit in the display for switching an enabling signal to the predetermined digit electrode responsive to the decoded digit drive signal, a segment driver for each segment in the digit for switching an actuating signal to the predetermined segment electrodes responsive to the decoded segment drive signals, said actuating signal having a frequency below the upper cutoff frequency and a polarity opposite from the polarity of said enabling signal, one like segment electrode in each digit being common with one like segment electrode in each other digit, whereby said decoded segment drive signal applies said actuating signal to all like segment electrodes simultaneously, said decoded digit drive signals operating to apply said enabling signal to said digit electrodes in sequence within a digit multiplexing cycle, said digit driver including means for applying a quiescent digit signal to said digit electrode in the absence of said digit drive signal, said segment driver including means for applying a quiescent segment signal to said segment electrodes in the absence of said segment drive signal, means for adjusting the amplitude of said actuating signal, so that the RMS value of the difference between said enabling and actuating signals during one digit multiplexing cycle at an actuated segment is greater than said saturation voltage, and means for adjusting the amplitude of said quiescent segment signal, so that the RMS value of the difference between said digit and segment quiescent signals during one digit multiplexing cycle at a quiescent segment is less than said threshold voltage, whereby maximum contrast appears in the display at actuated segments and ghost displays at quiescent segments are eliminated.
Claim 2
Dependent Claim
372 words
A driver circuit for receiving decoded segment and digit drive signals for determining application of electrical potential between predetermined segment and digit electrodes having liquid crystal material disposed therebetween to thereby form a liquid crystal display, said liquid crystal material operating to provide maximum contrast between areas underlying energized segment electrodes and surrounding areas when RMS voltage between segment and digit electrodes is at or above a saturating voltage and no contrast between such areas when RMS voltage therebetween is below a threshold voltage, said liquid crystal display having an upper cut-off frequency related to display capacitive characteristic, comprising a digit driver for each digit in the display for switching an enabling signal to the predetermined digit electrode responsive to the decoded digit drive signal, a segment driver for each segment in the digit for switching an actuating signal to the predetermined segment electrodes responsive to the decoded segment drive signals, said actuating signal having a frequency below the upper cutoff frequency and a polarity opposite from the polarity of said enabling signal, one like segment electrode in each digit being common with one like segment electrode in each other digit, whereby said decoded segment drive signal applies said actuating signal to all like segment electrodes simultaneously, said decoded digit drive signals operating to apply said enabling signal to said digit electrodes in sequence within a digit multiplexing cycle, said digit driver including means for applying a quiescent digit signal to said digit electrode in the absence of said digit drive signal, said segment driver including means for applying a quiescent segment signal to said segment electrodes in the absence of said segment drive signal, means for adjusting the amplitude of said actuating signal, so that the RMS value of the difference between said enabling and actuating signals during one digit multiplexing cycle at an actuated segment is greater than said saturation voltage, and means for adjusting the amplitude of said quiescent segment signal, so that the RMS value of the difference between said digit and segment quiescent signals during one digit multiplexing cycle at a quiescent segment is less than said threshold voltage, whereby maximum contrast appears in the display at actuated segments and ghost displays at quiescent segments are eliminated.
Claim 3
Dependent Claim
55 words
A driver circuit as in claim 1 together with additional means included in said digit driver for adjusting the amplitude of said digit quiescent signal, so that the RMS value of the difference between said digit and segment quiescent signals at a quiescent segment during one digit multiplexing cycle is less than said threshold voltage.
Claim 4
Dependent Claim
49 words
A driver circuit as in claim 1 wherein said digit driver comprises a field effect transistor having a gate, source, and drain, with said gate connected to receive said digit drive signal, and wherein said means for applying a quiescent digit signal comprises a resistor connected to said drain.
Claim 5
Dependent Claim
176 words
A driver circuit as in claim 1 wherein said digit driver comprises a first field effect transistor having a gate, source and drain, with said gate of said first field effect transistor connected to receive said digit drive signal and providing a low impedance path between source and drain responsive thereto, said means for applying a quiescent digit signal comprises a second field effect transistor havng a gate, source and drain, with said gate of said second field effect transistor connected to receive said digit drive signal and providing a low impedance path between source and drain responsive thereto, together with a third field effect transistor having a gate, source and drain, with said gate of said third field effect transistor connected to said drain of second field effect transistor, said third field effect transistor providing a low impedance path between source and drain when second field effect transistor source-drain impedance is high, said first field effect transistor having its drain connected to one of said digit electrodes and its source connected to said enabling signal.
Claim 6
Dependent Claim
133 words
A driver circuit as in claim 1 wherein said segment driver further includes a first field effect transistor having a gate, source and drain, with said gate of said first field effect transistor connected to receive said segment drive signal and providing a low source-drain impedance path responsive thereto, said first field effect transistor drain being connected to said actuating signal and said source being connected to said segment electrodes, wherein said means for applying a quiescent segment signal comprises a second field effect transistor having a gate, source and drain, with said second field effect transistor source connected to said quiescent segment signal and said drain connected to said segment electrodes, said means for adjusting the amplitude of said actuating signal comprising a resistor connected to said first field effect transistor source,
Claim 7
Dependent Claim
44 words
A driver circuit as in claim 1 together with means for adjusting the frequency of said actuating signal, thereby adjusting liquid crystal impedance, whereby the RMS values of said saturation voltage and said threshold voltage required for on and off displays respectively is adjusted.
Claim 8
Dependent Claim
330 words
A driver circuit for receiving decoded segment and digit driver signals for providing application of electrical potential between predetermined segment and digit electrodes having liquid crystal material disposed therebetween for forming a liquid crystal display, said liquid crystal material having RMS saturation and threshold voltage characteristics and operating to provide maximum contrast between areas underlying energized segment electrodes and surrounding areas when RMS voltage between segment and digit electrodes is at or above the saturation voltage and no contrast between such areas when RMS voltage therebetween is below the threshold voltage, said liquid crystal display having a predetermined capacitance between the segment and digit electrodes, comprising a digit driver for each digit in the display operating to apply an enabling signal to each digit electrode in sequence within a digit multiplexing cycle responsive to the decoded digit drive signal, a segment driver for each segment in the digit for applying an actuating signal to the predetermined segment electrodes responsive to the decoded segment drive signals, one like segment electrode in each digit being common with one like segment electrode in each other digit, whereby said decoded segment drive signal applies said actuating signal to all like segment electrodes simultaneously, said digit driver including means for applying a quiescent digit signal to said digit electrode in the absence of said digit drive signal, said segment driver including means for applying a quiescent segment signal to said segment electrodes in the absence of said segment drive signal, means connected to said segment driver for providing said actuating signal at a predetermined frequency, said predetermined frequency being lower than a cutoff frequency for said liquid crystal display determined by said predetermined capacitance, whereby the RMS saturation and threshold voltages are adjusted to match the liquid crystal characteristics by selection of said predetermined frequency to obtain an optimum ratio therebetween so that critical regulation of enabling and actuating signals is obviated while maintaining maximum contrast between displayed segments and maximum contrast between non-displayed segments.
Claim 9
Dependent Claim
330 words
A driver circuit for receiving decoded segment and digit driver signals for providing application of electrical potential between predetermined segment and digit electrodes having liquid crystal material disposed therebetween for forming a liquid crystal display, said liquid crystal material having RMS saturation and threshold voltage characteristics and operating to provide maximum contrast between areas underlying energized segment electrodes and surrounding areas when RMS voltage between segment and digit electrodes is at or above the saturation voltage and no contrast between such areas when RMS voltage therebetween is below the threshold voltage, said liquid crystal display having a predetermined capacitance between the segment and digit electrodes, comprising a digit driver for each digit in the display operating to apply an enabling signal to each digit electrode in sequence within a digit multiplexing cycle responsive to the decoded digit drive signal, a segment driver for each segment in the digit for applying an actuating signal to the predetermined segment electrodes responsive to the decoded segment drive signals, one like segment electrode in each digit being common with one like segment electrode in each other digit, whereby said decoded segment drive signal applies said actuating signal to all like segment electrodes simultaneously, said digit driver including means for applying a quiescent digit signal to said digit electrode in the absence of said digit drive signal, said segment driver including means for applying a quiescent segment signal to said segment electrodes in the absence of said segment drive signal, means connected to said segment driver for providing said actuating signal at a predetermined frequency, said predetermined frequency being lower than a cutoff frequency for said liquid crystal display determined by said predetermined capacitance, whereby the RMS saturation and threshold voltages are adjusted to match the liquid crystal characteristics by selection of said predetermined frequency to obtain an optimum ratio therebetween so that critical regulation of enabling and actuating signals is obviated while maintaining maximum contrast between displayed segments and maximum contrast between non-displayed segments.
Claim 10
Dependent Claim
47 words
A driver circuit as in claim 7 wherein said digit driver includes means for adjusting the amplitude of said digit quiescent signal, so that the RMS value of the difference between digit and segment quiescent signals during one digit multiplexing cycle is less than said threshold voltage.
Claim 11
Dependent Claim
49 words
A driver circuit as in claim 7 wherein said digit driver comprises a field effect transistor having a gate, source and drain, with said gate connected to receive said digit drive signal, and wherein said means for applying a quiescent digit signal comprises a resistor connected to said drain.
Claim 12
Dependent Claim
176 words
A driver circuit as in claim 7 wherein said digit driver comprises a first field effect transistor having a gate, source and drain, with said gate of said first field effect transistor connected to receive said digit drive signal and providing a low impedance path between source and drain responsive thereto, said means for applying a quiescent digit signal comprising a second field effect transistor having a gate, source and drain, with said gate of said second field effect transistor connected to receive said digit drive signal and providing a low impedance path between source and drain responsive thereto, together with a third field effect transistor having a gate, source and drain, with said gate of said third effect transistor connected to said drain of said second field effect transistor, said third field effect transistor providing a low impedance path between source and drain when second field effect transistor source-drain impedance is high, said first field effect transistor having its drain connected to one of said digit electrodes and its source connected to said enabling signal.
Claim 13
Dependent Claim
162 words
A driver circuit as in claim 7 wherein said segment driver comprises a first field effect transistor having a gate, source and drain, with said gate of said first field effect transistor connected to receive said segment driver signal and providing a low source-drain impedance path responsive thereto, said first field effect transistor drain being connected to said actuating signal and said source being connected to said segment electrodes, and wherein said means for applying a quiescent segment signal includes a second field effect transistor having a gate, source and drain, with said second field effect transistor source connected to said quiescent segment signal and said drain connected to said segment electrodes, together with a third field effect transistor having a gate, source and drain, with said third field effect transistor gate connected to receive said segment drive signal and said drain connected to said second field effect transistor gate for controlling impedance between said second field effect transistor source and drain.
Claim 14
Dependent Claim
64 words
A driver circuit as in claim 7 together with additional means for adjusting the amplitude of said actuating signal included in said segment driver, so that the RMS value of the difference between said enabling and actuating signals during one digit multiplexing cycle is greater than said saturation voltage at energized segments and less than said threshold voltage at unenergized segments in the display.
Claim 15
Dependent Claim
64 words
A driver circuit as in claim 7 together with additional means for adjusting the amplitude of said enabling signal included in said digit driver, so that the RMS value of the difference between said enabling and actuating signals during one digit multiplexing cycle is greater than said saturation voltage at energized segments and less than said threshold voltage at unenergized segments in the display.
Claim 16
Dependent Claim
59 words
A driver circuit as in claim 7 together with additional means for adjusting the amplitude of said quiescent digit signal included in said digit driver, so that the RMS value of the difference of electrical potential between an unenabled digit electrode and the segment electrodes during one digit multiplexing cycle is less than said threshold voltage of the display.
Claim 17
Dependent Claim
59 words
A driver circuit as in claim 7 together with additional means for adjusting the amplitude of said quiescent segment signal included in said segment driver, so that the RMS value of the difference of electrical potential between an unactuated segment electrode and the digit electrode during one digit multiplexing cycle is less than said threshold voltage of the display.
References Cited (Backward Citations)
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1980-08-08 | 1981-02-07 | 1981-08-09 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1984-08-08 | 1985-02-07 | 1985-08-09 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1988-08-08 | 1989-02-07 | 1989-08-09 | $7700.00 | Window Closed / Lapsed |