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US4054787A
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Apparatus for computing an arithmetically accumulated sequence of numbers
Assignee: United States Department of the Navy
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Filing: 1975-06-06
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Granted: 1977-10-18
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Expires: 1995-06-06
Abstract
Abstract Apparatus for computing an arithmetically accumulated sequence of exponenantissa formatted numbers, which comprises write-in apparatus and read-out apparatus. The write-in apparatus comprises means for separating each of a sequence of numbers in exponent-mantissa form according to the values of the exponent, the value of the exponent being employed as a storing address for the number. Means connected to the separating means algebraically sum mantissas of like exponents; the two above means comprising a write logic block. A random-access memory is connected to the summing means for storing the sum of the mantissas. It also includes means for addressing the storing means. Means are connected between the storing means and the summing means for writing the last stored quantity back into the summing means, so that it may be summed algebraically to the latest incoming mantissa from the sequence of numbers, the new sum then being written back into that part of the random-access memory with the same, like, exponent address. The read-out apparatus is similar to the write-in apparatus.
Inventors
- 👤 Norman D. Pos
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-29 19:30
CPC Classifications
G; G06; G06F; G06F7/00; G06F7/38; G06F7/48; G06F7/483; G06F7/485; G06F7/50; G06F7/505; G06F7/509
Claims Analysis
Total Claims: 7
Claim 1
Independent Claim
163 words
Apparatus for computing an arithmetically accumulated sequence of exponent-mantissa formatted numbers, comprising write-in apparatus and readout apparatus, the write-in apparatus comprising: means for separating each of a sequence of binary numbers in exponent-mantissa form according to the values of the exponent, the value of the exponent being employed as a storing address for the number; means connected to the separating means for algebraically summing mantissas of like exponents, the two above means comprising a write logic block; first means connected to the summing means for storing the sum of the mantissas; means for connecting the mantissa storing means and the summing means, which enables writing the last stored quantity back into the summing means, so that it may be summed algebraically to the latest incoming mantissa of like exponent from the sequence of numbers, the new sum then being written back into the storing means having the same, like, exponent address; and means, connected to the separating means, for addressing the storing means.
Claim 2
Dependent Claim
163 words
Apparatus for computing an arithmetically accumulated sequence of exponent-mantissa formatted numbers, comprising write-in apparatus and readout apparatus, the write-in apparatus comprising: means for separating each of a sequence of binary numbers in exponent-mantissa form according to the values of the exponent, the value of the exponent being employed as a storing address for the number; means connected to the separating means for algebraically summing mantissas of like exponents, the two above means comprising a write logic block; first means connected to the summing means for storing the sum of the mantissas; means for connecting the mantissa storing means and the summing means, which enables writing the last stored quantity back into the summing means, so that it may be summed algebraically to the latest incoming mantissa of like exponent from the sequence of numbers, the new sum then being written back into the storing means having the same, like, exponent address; and means, connected to the separating means, for addressing the storing means.
Claim 3
Dependent Claim
19 words
The apparatus according to claim 1 wherein: the storing means and the addressing means comprise a random-access memory RAM.
Claim 4
Dependent Claim
130 words
Apparatus for computing an arithmetically accumulated sequence of exponent-mantissa formatted numbers, according to claim 2, said read-out apparatus comprising: a second summing means, connected to the random-access memory, which, starting with the least significant data in the RAM, reads out the data in the RAM; an address counter, connected to the random-access memory, which sequentially steps the read addresses; an accumulator register, connected to the second summing means, which accumulates the least significant data, and writes it back into the summing means, where it is accumulated with the next least significant data, the reading out and writing in, that is, the accumulating, continuing until all the data in the random-access memory is read out, the combination of second summing means, address counter, and accumulator register comprising a read logic block.
Claim 5
Dependent Claim
49 words
The computing apparatus according to claim 3, further comprising: an output register, connected to the accumulator register, of the read logic block, which reads out the totally accumulated data in the accumulator register, the data now being formatted as a pure magnitude in binary form without an explicit exponent.
Claim 6
Dependent Claim
139 words
The computing apparatus according to claim 4 further comprising apparatus for reconstituting the data formatted as a pure magnitude in binary form, which comprises: an output register, connected to the accumulator register of the read logic block, whose contents are shifted up, leaving the significant bit unchanged, until the two next most significant digits disagree; an exclusive-or gate, connected to the output of the output register, which determines when the two most significant digits disagree; an inhibit gate, having as inputs a clock input and the output of the exclusive-or gate, which inhibit gate is inhibited by the exclusive-or gate when the two most significant digits disagree, thereby terminating the reformatting process, the most significant bits in the output register designating the sign and mantissa of the accumulated data the exponent counter designating the exponent of the accumulated data.
Claim 7
Dependent Claim
92 words
The computing apparatus according to claim 3, further comprising: another random-access memory, substantially identical to the first-named memory; a first switching means, connected to the write logic block, which transfers data selectively from the write logic block to the first-and-second named random-access memory: a second switching means, connected to the read logic block and selectively to the second-named and first-named random-access memory, so that as data is written into one random-access memory from the write logic block it may be read out of the other random-access memory by the read logic block.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1980-10-17 | 1981-04-18 | 1981-10-18 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1984-10-17 | 1985-04-18 | 1985-10-18 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1988-10-17 | 1989-04-18 | 1989-10-18 | $7700.00 | Window Closed / Lapsed |