Method of preparation of SOS extrinsic infrared detector and read-out device

Claim 1

A method of preparing a SOS extrinsic IR detector and readout device on an epitaxial structure comprising the steps of: providing a single crystal sapphire substrate; epitaxially depositing a layer of single crystal silicon on one side of said sapphire substrate; masking said layer of single crystal silicon with etch masks to delineate a plurality of detector islands and a CCD signal readout structure; non-slective chemically etching through said layer of single crystal silicon down to said sapphire substrate to delineate a plurality of individual intrinsic silicon detector islands and a silicon CCD signal readout structure in proximity thereto on one side of said sapphire substrate; unmasking said layer of single crystal silicon as delineated in step three; covering said silicon CCD signal readout structure with a protective mask and doping said plurality of individual intrinsic silicon detector islands with slow or rapid diffusant dopant materials into a plurality of individual extrinsic silicon detectors possessing a desired infrared wavelength region wherein said slow or rapid diffusant dopant materials are kept out of said silicon CCD readout structure; removing said protective mask from said silicon CCD readout structure and masking said plurality of individual extrinsic silicon detector islands; diffusing a plurality of slow diffusant type input diffusions into the portion of said silicon CCD readout structure that is adjacent said plurality of extrinsic silicon detector islands; growing an insulating layer over said silicon CCD readout structure; photolithographically etching away the portion of said insulation layer that is directly over said plurality of slow diffusant type input diffusions; cleaning said substrate surfaces; evaporating a metallized layer over the silicon device side of said substrate; photolithographically etching away said metallized layer to leave the following conductive structures thereon, a lead from said silicon CCD readout structure to an electrical ground; a buss line common to the inputs of all of said plurality of extrinsic silicon detectors; a plurality of detector output leads connected between an output side of said plurality of extrinsic silicon detectors and said plurality of input diffusions; a plurality of input structure pads and a lead electrically connecting said plurality of input structure pads; a plurality of CCD pads; and a plurality of CCD voltage drive lines having individually electrically isolated lines that are electrically connected to intermittently repated numbers of said plurality of CCD pads of said plurality of CCD pads in some preselected phasing and whrein said plurality of input structure pads are positioned between each of said plurality of input diffusions and adjacent to said intermittently repeated numbers of said plurality of CCD pads in which each of said plurality of input structure pads is positioned opposite the common connection of said CCD voltage drive line in said preselected phasing; providing a buss line voltage source to said buss line for providing flow of carriers in said plurality of extrinsic silicon detectors when infrared radiation impinges thereon; providing an input pad voltage source and driver to said common metallic lead electrically connecting said input structure pads; and providing a CCD phased voltage source having phased voltages connected to individual lines of said plurality of CCD voltage drive lines to provide CCD signal readout of signals generated in said plurality of extrinsic silicon detectors by infrared radiation impinging thereon in which said input pad voltage source and driver sequentially switches a voltage to all of said plurality of extrinsic silicon detectors and inject these readout signals in the layer of said silicon CCD signal readout structure that is immediately below said plurality of metal CCD pads.

Claim 2

A method of preparing a SOS extrinsic IR detector and readout device on an epitaxial structure comprising the steps of: providing a single crystal sapphire substrate; epitaxially depositing a layer of single crystal silicon on one side of said sapphire substrate; masking said layer of single crystal silicon with etch masks to delineate a plurality of detector islands and a CCD signal readout structure; non-slective chemically etching through said layer of single crystal silicon down to said sapphire substrate to delineate a plurality of individual intrinsic silicon detector islands and a silicon CCD signal readout structure in proximity thereto on one side of said sapphire substrate; unmasking said layer of single crystal silicon as delineated in step three; covering said silicon CCD signal readout structure with a protective mask and doping said plurality of individual intrinsic silicon detector islands with slow or rapid diffusant dopant materials into a plurality of individual extrinsic silicon detectors possessing a desired infrared wavelength region wherein said slow or rapid diffusant dopant materials are kept out of said silicon CCD readout structure; removing said protective mask from said silicon CCD readout structure and masking said plurality of individual extrinsic silicon detector islands; diffusing a plurality of slow diffusant type input diffusions into the portion of said silicon CCD readout structure that is adjacent said plurality of extrinsic silicon detector islands; growing an insulating layer over said silicon CCD readout structure; photolithographically etching away the portion of said insulation layer that is directly over said plurality of slow diffusant type input diffusions; cleaning said substrate surfaces; evaporating a metallized layer over the silicon device side of said substrate; photolithographically etching away said metallized layer to leave the following conductive structures thereon, a lead from said silicon CCD readout structure to an electrical ground; a buss line common to the inputs of all of said plurality of extrinsic silicon detectors; a plurality of detector output leads connected between an output side of said plurality of extrinsic silicon detectors and said plurality of input diffusions; a plurality of input structure pads and a lead electrically connecting said plurality of input structure pads; a plurality of CCD pads; and a plurality of CCD voltage drive lines having individually electrically isolated lines that are electrically connected to intermittently repated numbers of said plurality of CCD pads of said plurality of CCD pads in some preselected phasing and whrein said plurality of input structure pads are positioned between each of said plurality of input diffusions and adjacent to said intermittently repeated numbers of said plurality of CCD pads in which each of said plurality of input structure pads is positioned opposite the common connection of said CCD voltage drive line in said preselected phasing; providing a buss line voltage source to said buss line for providing flow of carriers in said plurality of extrinsic silicon detectors when infrared radiation impinges thereon; providing an input pad voltage source and driver to said common metallic lead electrically connecting said input structure pads; and providing a CCD phased voltage source having phased voltages connected to individual lines of said plurality of CCD voltage drive lines to provide CCD signal readout of signals generated in said plurality of extrinsic silicon detectors by infrared radiation impinging thereon in which said input pad voltage source and driver sequentially switches a voltage to all of said plurality of extrinsic silicon detectors and inject these readout signals in the layer of said silicon CCD signal readout structure that is immediately below said plurality of metal CCD pads.