US4280854A
Expired / Lapsed
US
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Method of manufacturing a semiconductor device having conductive and insulating portions formed of a common material utilizing selective oxidation and angled ion-implantation
Assignee: Mitsubishi Electric Corp
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Filing: 1979-05-01
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Granted: 1981-07-28
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Expires: 1999-05-01
Abstract
Abstract A semiconductor device is manufactured by covering a semiconductor substrate of a predetermined conductivity type with a polycrystal layer of a semiconductor material. Selected portions of the polycrystal layer are oxidized into an insulating material during heat treatment. Remaining portions of the polycrystal layer which are left unoxidized act as conductive portions. On manufacturing a bipolar transistor, ion implantation is carried out in a predetermined solid angle to introduce an impurity of an opposite conductivity selectively in a preselected one of the remaining portions. During the heat treatment, the impurity diffuses into the substrate only from the preselected portion to form a PN junction in the substrate. For fabricating an MOS transistor, an oxide film is preliminarily formed on the substrate selectively on an area on which a predetermined one of the remaining polycrystal layer portions is to be formed. Ion implantation is carried out to introduce an impurity of the opposite conductivity in the respective remaining layer portions. The oxide film prevents the impurity from diffusing to the substrate. The impurity diffuses into the substrate only from the respective remaining portions, except the predetermined portion.
Inventors
- 👤 Hiroshi Shibata
- 👤 Hideo Iwasaki
- 👤 Kunio Yamada
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-09 10:02
CPC Classifications
H; H10; H10P; H10P32/00; H10P32/10; H10P32/17; H10P32/171; H10P32/14; H10P32/1408; H10P32/1414; H10P76/00; H10P76/40; H10P95/00; H10W; H10W20/00; H10W20/01; H10W20/031; H10W20/064; H10W20/065; Y; Y10; Y10S; Y10S148/00; Y10S148/143; Y10S438/00; Y10S438/914; Y10S438/92
Claims Analysis
Total Claims: 3
Claim 1
Independent Claim
351 words
A method of manufacturing a semiconductor device comprising a semiconductor substrate having a principal surface and a predetermined conductivity type, said method comprising the steps of: selectively forming, in said substrate, a first semiconductor region reaching said principal surface, said first semiconductor region being of the conductivity type opposite to said predetermined conductivity type to define a first PN junction in said substrate; forming a layer of a conductive material on said principal surface to cover said first semiconductor region, said material being oxidizable into an insulating material when heated; selectively forming a photoresist layer on said conductive layer to a predetermined thickness with a first and a second portion of said conductive layer exposed over said first semiconductor region, said first and said second conductive layer portions having a first width and a second width wider than said first width, respectively, said second conductive layer portion being placed inside said first conductive layer portion with the photoresist layer left therebetween; carrying out ion implantation to introduce an impurity of the predetermined conductivity type substantially only on said second conductive layer portion at a first and a second angle to said principal surface, said first and said second angles being selected in consideration of said predetermined thickness and said first and said second widths; forming a layer of a protective material on said photoresist layer and said first and said second conductive layer portions, said protective material preventing those portions of said conductive layer placed on said first and said second conductive layer portions, respectively, from being oxidized; removing said photoresist layer together with the protective layer portion formed thereon to expose the conductive layer portions other than said first and said second conductive layer portions; forming a second semiconductor region of the predetermined conductivity type in said first semiconductor region by making said impurity diffuse from said second conductive layer portion while said exposed portions are oxidized into insulating layer portions, said second semiconductor region providing a second PN junction in said first semiconductor region; and removing the protective layer remaining on said first and said second conductive layer portions.
Claim 2
Independent Claim
351 words
A method of manufacturing a semiconductor device comprising a semiconductor substrate having a principal surface and a predetermined conductivity type, said method comprising the steps of: selectively forming, in said substrate, a first semiconductor region reaching said principal surface, said first semiconductor region being of the conductivity type opposite to said predetermined conductivity type to define a first PN junction in said substrate; forming a layer of a conductive material on said principal surface to cover said first semiconductor region, said material being oxidizable into an insulating material when heated; selectively forming a photoresist layer on said conductive layer to a predetermined thickness with a first and a second portion of said conductive layer exposed over said first semiconductor region, said first and said second conductive layer portions having a first width and a second width wider than said first width, respectively, said second conductive layer portion being placed inside said first conductive layer portion with the photoresist layer left therebetween; carrying out ion implantation to introduce an impurity of the predetermined conductivity type substantially only on said second conductive layer portion at a first and a second angle to said principal surface, said first and said second angles being selected in consideration of said predetermined thickness and said first and said second widths; forming a layer of a protective material on said photoresist layer and said first and said second conductive layer portions, said protective material preventing those portions of said conductive layer placed on said first and said second conductive layer portions, respectively, from being oxidized; removing said photoresist layer together with the protective layer portion formed thereon to expose the conductive layer portions other than said first and said second conductive layer portions; forming a second semiconductor region of the predetermined conductivity type in said first semiconductor region by making said impurity diffuse from said second conductive layer portion while said exposed portions are oxidized into insulating layer portions, said second semiconductor region providing a second PN junction in said first semiconductor region; and removing the protective layer remaining on said first and said second conductive layer portions.
Claim 3
Dependent Claim
51 words
A method as claimed in claim 1, wherein said predetermined thickness is about three microns, said first and said second widths being about two and five microns, respectively, each of said first and said second angles being about 45° when said first and said second angles are represented by acute angles.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1984-07-27 | 1985-01-26 | 1985-07-28 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1988-07-27 | 1989-01-26 | 1989-07-28 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1992-07-27 | 1993-01-26 | 1993-07-28 | $7700.00 | Window Closed / Lapsed |