Patent US4308585A successfully refreshed from Google Patents.
US4308585A
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Electronic memory unit
Assignee: J J LLOYD INSTRUMENTS Ltd
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Filing: 1979-10-01
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Granted: 1981-12-29
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Expires: 1999-10-01
Abstract
Abstract In an electronic memory unit for processing a pair of transient electrical signals prior to recording by an XY plotter, a random access memory receives digitized samples of the signals at a dynamically variable rate which is determined by the rate of change of the input signals. The said rate is controlled by sampling decision circuits which sense the difference in level between successive samples. The stored samples are read out of the memory to digital-to-analogue converters at a rate which is suited to the characteristics of the XY plotter connected to the outputs of the unit thereby enabling rapidly changing signals fed to the inputs of the unit to be recorded accurately without wasteful use of memory capacity.
Inventors
- 👤 Christopher Jordan
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-31 21:26
CPC Classifications
G; G01; G01R; G01R13/00; G01R13/20; G01R13/22; G01R13/34; G11; G11C; G11C27/00; G11C27/02; G11C5/00
Claims Analysis
Total Claims: 14
Claim 1
Independent Claim
94 words
A method of processing at least one time varying electrical signal, the method including the steps of: sampling the signal to provide a succession of sample values; sensing a rate of change of the signal; converting the sample values to digital form; writing the digitized sample values into an electronic memory device at a writing rate; and simultaneously reading out previously stored sample values from the memory at a rate which is different from the writing rate; said writing rate being automatically variable in response to the sensed rate of change of the signal.
Claim 2
Independent Claim
94 words
A method of processing at least one time varying electrical signal, the method including the steps of: sampling the signal to provide a succession of sample values; sensing a rate of change of the signal; converting the sample values to digital form; writing the digitized sample values into an electronic memory device at a writing rate; and simultaneously reading out previously stored sample values from the memory at a rate which is different from the writing rate; said writing rate being automatically variable in response to the sensed rate of change of the signal.
Claim 3
Dependent Claim
26 words
A method according to claim 1, wherein the conversion of sample values into digital form is performed repetitively at the same rate as the writing rate.
Claim 4
Independent Claim
183 words
A method for recording two time-varying electrical signals in the form of a graph in which the level of one signal is plotted as a function of the level of the other, the method including the steps of: (i) sampling both signals at a single, variable sampling rate, which rate is increased in response to an increase in the rate of change of either of the said signals; (ii) converting the samples of both signals to a digital form; (iii) writing the digital sample values into the memory; (iv) simultaneously with steps (i) to (iii) above, reading out stored sample values from the memory at a readout rate which is different from the said sampling rate; (v) converting the read out sample values into two analogue output signals representing the two time-varying electrical signals; and (vi) feeding the output signals to a recording instrument, whereby the recording element of the instrument moves in an X direction in response to the level of one of the output signals, and in a perpendicular Y direction in response to the level of the other output signal.
Claim 5
Independent Claim
183 words
A method for recording two time-varying electrical signals in the form of a graph in which the level of one signal is plotted as a function of the level of the other, the method including the steps of: (i) sampling both signals at a single, variable sampling rate, which rate is increased in response to an increase in the rate of change of either of the said signals; (ii) converting the samples of both signals to a digital form; (iii) writing the digital sample values into the memory; (iv) simultaneously with steps (i) to (iii) above, reading out stored sample values from the memory at a readout rate which is different from the said sampling rate; (v) converting the read out sample values into two analogue output signals representing the two time-varying electrical signals; and (vi) feeding the output signals to a recording instrument, whereby the recording element of the instrument moves in an X direction in response to the level of one of the output signals, and in a perpendicular Y direction in response to the level of the other output signal.
Claim 6
Dependent Claim
27 words
A method according to claim 3 wherein the readout rate is variable in response to the rate of change of at least one of the output signals.
Claim 7
Dependent Claim
45 words
A method according to claim 4 wherein the time differential of each output signal is monitored and the readout rate is varied in response to the monitored differential values to maintain at least one of the differential values at or near a predetermined maximum value.
Claim 8
Dependent Claim
33 words
A method according to claim 3 wherein the output signals comprise sample values read out from the memory and converted to analogue form together with interpolated values inserted between the said sample values.
Claim 9
Dependent Claim
75 words
A method according to claim 6 wherein sample values read out from the memory are converted to analogue form, voltages corresponding to a current sample X i and the previous sample X i-1 being fed to respective ends of a potential divider chain to generate a linear series of intermediate interpolation values which are sequentially fed to the output of the respective channel of the unit between the sample values read out of the memory.
Claim 10
Dependent Claim
135 words
An electronic memory unit comprising: (i) input signal sampling means for sampling a time-varying input signal; (ii) analogue-to-digital conversion means connected to the sampling means for converting the samples into digital form; (iii) difference determining means for determining the incremental difference in level between adjacent sample values; (iv) an electronic memory stage linked to the analogue-to-digital conversion means and controllable simultaneously to store and read out digitized sample values, the rate of storing samples being controlled automatically by the said difference determining means and related to the rate of change of the input signal, and the readout rate being different from the rate at which samples are entered for storage; and (v) digital-to-analogue conversion means linked to the electronic memory stage for converting the values read out from the electronic memory stage into analogue form.
Claim 11
Dependent Claim
135 words
An electronic memory unit comprising: (i) input signal sampling means for sampling a time-varying input signal; (ii) analogue-to-digital conversion means connected to the sampling means for converting the samples into digital form; (iii) difference determining means for determining the incremental difference in level between adjacent sample values; (iv) an electronic memory stage linked to the analogue-to-digital conversion means and controllable simultaneously to store and read out digitized sample values, the rate of storing samples being controlled automatically by the said difference determining means and related to the rate of change of the input signal, and the readout rate being different from the rate at which samples are entered for storage; and (v) digital-to-analogue conversion means linked to the electronic memory stage for converting the values read out from the electronic memory stage into analogue form.
Claim 12
Dependent Claim
110 words
A memory unit according to claim 8, wherein: (i) the sampling means includes a pair of sampling circuits, each circuit being arranged to sample a respective one of two time-varying input signals at the same sampling rate; (ii) the analogue-to-digital conversion means includes a pair of analogue-to-digital converters arranged to perform a conversion cycle each time a signal received from the difference determining means indicates that either one of a pair of samples generated by the sampling means exceeds the corresponding previous sample by more than a predetermined amount; and (iii) the digital-to-analogue conversion means includes two digital-to-analogue converters arranged to generate two output signals representing the two input signals.
Claim 13
Dependent Claim
48 words
A memory unit according to claim 8, including control logic means for monitoring the number of storage locations in the electronic memory stage which are storing data, and which is connected to the analogue-to-digital conversion means to limit the sampling rate when the electronic memory stage is full.
Claim 14
Dependent Claim
98 words
A memory unit according to claim 9, in combination with an XY plotter, wherein said two digital-to-analogue converters have outputs, said memory unit further including a readout rate control means coupled to the outputs of the two digital-to-analogue converters for monitoring differential values of converted sample values, and coupled via control logic to the electronic memory stage to decrease the readout rate when the difference between adjacent readout sample values is large, whereby to maintain the rate of change of at least one of the output signals from the unit values at or near a maximum predetermined value.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1984-12-28 | 1985-06-29 | 1985-12-29 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1988-12-28 | 1989-06-29 | 1989-12-29 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1992-12-28 | 1993-06-29 | 1993-12-29 | $7700.00 | Window Closed / Lapsed |