Patent EP0445667A2 successfully refreshed from Google Patents.
Patent US4413236A successfully refreshed from Google Patents.
US4413236A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Circuit for deriving a timing signal from digital imput signals
Assignee: Robert Bosch GmbH
•
Filing: 1980-12-16
•
Granted: 1983-11-01
•
Expires: 2000-12-16
Abstract
Abstract To obtain a timing signal in the regeneration of digital pulses from recordings or after transmission, two start-stop oscillators are triggered, respectively, by signals to be regenerated and by the same signals after inversion. The output signals from these oscillators are combined into a single signal which has the frequency of the desired timing signal, and a flywheel circuit is used to produce a continuously alternating voltage. Each of the start-stop oscillators is conveniently implemented by a pair of transistors whose emitters are interconnected by an inductor and individually connected to an operating voltage via a capacitor and a resistor, respectively.
Inventors
- 👤 Josef Sochor
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-29 18:19
CPC Classifications
H; H04; H04L; H04L7/00; H04L7/02; H04L7/033; G; G11; G11B; G11B20/00; G11B20/10; G11B20/14; G11B20/1403; H04L7/027
Claims Analysis
Total Claims: 3
Claim 1
Independent Claim
191 words
Electrical circuit for producing a timing signal for the regeneration of pulses, said circuit comprising a first start-stop oscillator (22), a second start-stop oscillator (24), a combining circuit (27), a phase comparator circuit 29, a low pass filter (30), a variable oscillator (31), a pulse generator (32), means (20,21) for supplying input signals to said first start-stop oscillator (22), means (20,21,23) for supplying inverted input signals to said second start-stop oscillator (24), means (25) for supplying the output signals of said first start-stop oscillator (22) to said combining circuit (27), means (26) for supplying the output signals of said second start-stop oscillator (24) to said combining circuit (27), means for supplying the output of said combining circuit (27) to a first input terminal of said phase comparator circuit (29), means for supplying the output signal of said phase comparator circuit (29) to said low pass filter (30), means for supplying the output signal of said low pass filter (30) to said variable oscillator (31), means for supplying the output signal of said variable oscillator (31) to a second input terminal of said comparator circuit (29) and to said pulse generator (32).
Claim 2
Dependent Claim
191 words
Electrical circuit for producing a timing signal for the regeneration of pulses, said circuit comprising a first start-stop oscillator (22), a second start-stop oscillator (24), a combining circuit (27), a phase comparator circuit 29, a low pass filter (30), a variable oscillator (31), a pulse generator (32), means (20,21) for supplying input signals to said first start-stop oscillator (22), means (20,21,23) for supplying inverted input signals to said second start-stop oscillator (24), means (25) for supplying the output signals of said first start-stop oscillator (22) to said combining circuit (27), means (26) for supplying the output signals of said second start-stop oscillator (24) to said combining circuit (27), means for supplying the output of said combining circuit (27) to a first input terminal of said phase comparator circuit (29), means for supplying the output signal of said phase comparator circuit (29) to said low pass filter (30), means for supplying the output signal of said low pass filter (30) to said variable oscillator (31), means for supplying the output signal of said variable oscillator (31) to a second input terminal of said comparator circuit (29) and to said pulse generator (32).
Claim 3
Dependent Claim
205 words
Circuit according to claim 1, wherein said first and second start-stop oscillator each comprises: a first transistor (41); a second transistor (42); an inductor (43); a capacitor (46), and a resistor (57), the base of said first transistor (41) being connectable in the case of said first start-stop oscillator (22) to said input signal supplying means (20,21,47) and, in the case of said second start-stop oscillator (24), to said inverted input signal supplying means (23,48), the emitter of said first transistor (41) being connected to said capacitor (46) and said capacitor (46) being connected to a first pole of an operating voltage, the base of said second transistor being connected to a fixed voltage (U o ), the emitter of said second transistor being connected to said resistor (57) and said resistor being connectable to said first voltage pole, said inductor being connected between the respective emitters of said first and second transistors, and the collectors of said first transistor (41) and said second transistor (42) being both connected to the second pole of said operating voltage, said means (25,26,54-56) for supplying the outputs of said start-stop oscillators to said combining circuit (27) including connections to the respective first transistor of said start-stop oscillators (22,24).
References Cited (Backward Citations)
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1986-10-31 | 1987-05-02 | 1987-11-01 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1990-10-31 | 1991-05-02 | 1991-11-01 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1994-10-31 | 1995-05-02 | 1995-11-01 | $7700.00 | Window Closed / Lapsed |