Patent US4445205A successfully refreshed from Google Patents.
US4445205A
Expired / Lapsed
US
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Semiconductor memory core programming circuit
Assignee: Fairchild Semiconductor Corp
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Filing: 1981-12-28
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Granted: 1984-04-24
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Expires: 2001-12-28
Abstract
Abstract A programming pulse generating circuit, suitable for use on an electrically alterable read-only semiconductor memory, that decouples from the high voltage supply when in a standby condition so as to not draw current from the supply. Alternative voltage supply connections are effected by depletion mode devices.
Inventors
- 👤 Mark S. Ebel
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-25 04:53
CPC Classifications
G; G11; G11C; G11C16/00; G11C16/02; G11C16/06; G11C16/10; G11C16/12
Claims Analysis
Total Claims: 9
Claim 1
Independent Claim
237 words
A switching circuit for producing a programming pulse on a selected program line in the core of an electrically alterable read-only semiconductor memory of the type that utilizes a low voltage supply and a high voltage supply comprising: an input; an output node connected to the program line; first switching means connected between said output node and ground, operable in response to the reception of a first condition input signal from said input to connect said output node to ground, and further operable in response to the reception of a second condition input signal from said input to disconnect said output node from ground; and second switching means connected to said output node and adapted to be connected to either the low voltage supply or the high voltage supply, said second switching means connected to said input such that said second switching means is operable in response to the reception of said first condition input signal to connect said output node only to the low voltage supply and is further operable in response to the reception of said second condition input signal to connect said output node only to said high voltage supply, the conductance of said first switching means being greater than the conductance of said second switching means so as to be able to hold said output node at ground potential when said second switching means connects the output node to the low voltage supply.
Claim 2
Dependent Claim
237 words
A switching circuit for producing a programming pulse on a selected program line in the core of an electrically alterable read-only semiconductor memory of the type that utilizes a low voltage supply and a high voltage supply comprising: an input; an output node connected to the program line; first switching means connected between said output node and ground, operable in response to the reception of a first condition input signal from said input to connect said output node to ground, and further operable in response to the reception of a second condition input signal from said input to disconnect said output node from ground; and second switching means connected to said output node and adapted to be connected to either the low voltage supply or the high voltage supply, said second switching means connected to said input such that said second switching means is operable in response to the reception of said first condition input signal to connect said output node only to the low voltage supply and is further operable in response to the reception of said second condition input signal to connect said output node only to said high voltage supply, the conductance of said first switching means being greater than the conductance of said second switching means so as to be able to hold said output node at ground potential when said second switching means connects the output node to the low voltage supply.
Claim 3
Dependent Claim
95 words
The circuit of claim 1 wherein said second switching means comprises: a control node; a resistive current path between said output node and said control node; a first switch connected to conduct current between the low voltage supply and said control node, said first switch connected to said input so as to be controlled by said first and second condition input signals therefrom; and a second switch connected to conduct current between the high voltage supply and said control node, said second switch operable in response to the state of conduction of said first switch.
Claim 4
Dependent Claim
26 words
The circuit of claim 2 in which said first switch comprises a depletion mode field effect transistor device with its control gate connected to said input.
Claim 5
Dependent Claim
28 words
The circuit of claim 2 in which said resistive current path comprises a depletion mode field effect transistor device with its control gate connected to said output node.
Claim 6
Dependent Claim
27 words
The circuit of claim 2 in which said second switch comprises a depletion mode field effect transistor device with its control gate connected to said output node.
Claim 7
Dependent Claim
28 words
The circuit of claim 5 in which said resistive current path comprises a depletion mode field effect transistor device with its control gate connected to said output mode.
Claim 8
Dependent Claim
26 words
The circuit of claim 6 in which said first switch comprises a depletion mode field effect transistor device with its control gate connected to said input.
Claim 9
Dependent Claim
27 words
The circuit of claim 7 in which said first switching means comprises on enhancement mode field effect transistor device with its control gate connected to said input.
References Cited (Backward Citations)
US3688280A
Cited
US4151611A
Cited
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1987-04-24 | 1987-10-24 | 1988-04-24 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1991-04-24 | 1991-10-24 | 1992-04-24 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1995-04-24 | 1995-10-24 | 1996-04-24 | $7700.00 | Window Closed / Lapsed |