Patent US4503465A successfully refreshed from Google Patents.
US4503465A
Expired / Lapsed
US
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Analog signal comparator using digital circuitry
Assignee: RCA Licensing Corp
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Filing: 1982-11-24
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Granted: 1985-03-05
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Expires: 2002-11-24
Abstract
Abstract A microprocessor or other digital logic circuit recurrently tests the logical switching state of an input port. Based upon the outcome of such testing, the logical switching state at an output port is switched to the state opposite that of the input port. The recurrent testing develops at the output port a rectangular wave voltage that switches between upper and lower voltage levels. A filter coupled between the two ports develops at the input port a voltage representative of the average value of the output port voltage. The recurrent testing of the logical switching state of the input port produces a negative feedback of the output port voltage to the input port. The negative feedback develops a pulse-width modulated voltage at the output port that has an average value that is a multiple of the logic threshold voltage level of the digital logic circuit. To enable the digital logic circuit to perform a comparison of an analog voltage with a DC reference voltage, a second, comparison input port is coupled to the output port and is biased by the output port voltage at the logic threshold voltage level. The analog voltage and the DC reference voltage are then applied to the comparison input port. When the analog voltage exceeds the reference voltage, the voltage at the comparison port exceeds the logic threshold voltage level, resulting in the port being in a first logical switching state, and when the analog voltage is below the reference voltage, the voltage at the comparison port is below the logic threshold voltage level resulting in the input port being in the other logical switching state.
Inventors
- 👤 Charles M. Wine
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-07 21:50
CPC Classifications
H; H03; H03M; H03M1/00; H03M1/12; H03K; H03K7/00; H03K7/08; H03K5/00; H03K5/22; H03K5/24
Claims Analysis
Total Claims: 16
Claim 1
Independent Claim
150 words
An arrangement for developing at a first input port of a digital controller a voltage that is representative of the logic threshold voltage level exhibited by the digital circuitry employed by said controller for switching from one logical switching state to another logical switching state, said arrangement conprising a first input port and an output port of said digital controller, each port assuming logical switching states, means for developing at said input port a voltage representative of the voltage being developed at said output port and a logic network coupled to said first input port and to said output port for testing the logical switching state of the input port and based upon such testing switching the state of the output port to the state that is opposite that of the input port in a manner that results in said representative voltage being representative of said logic threshold voltage level.
Claim 2
Dependent Claim
150 words
An arrangement for developing at a first input port of a digital controller a voltage that is representative of the logic threshold voltage level exhibited by the digital circuitry employed by said controller for switching from one logical switching state to another logical switching state, said arrangement conprising a first input port and an output port of said digital controller, each port assuming logical switching states, means for developing at said input port a voltage representative of the voltage being developed at said output port and a logic network coupled to said first input port and to said output port for testing the logical switching state of the input port and based upon such testing switching the state of the output port to the state that is opposite that of the input port in a manner that results in said representative voltage being representative of said logic threshold voltage level.
Claim 3
Dependent Claim
65 words
An arrangement according to claim 1, wherein said representative voltage developing means includes a voltage divider having a first terminal coupled to said output port and a second terminal coupled to said input port and a filter capacitor coupled to said input port for developing at said input port a voltage representative of the average value of the voltage being developed at said output port.
Claim 4
Dependent Claim
29 words
An arrangement according to claim 1, wherein the voltage at said output port comprises a pulse-width modulated voltage having an average value proportional to said logic threshold voltage level.
Claim 5
Dependent Claim
38 words
An arrangement according to claim 3 including a voltage divider coupled to said input port and to said output port, the duty cycle of said pulse-width modulated voltage being determined by the divider ratio of said voltage divider.
Claim 6
Dependent Claim
109 words
A digital comparator of an analog sensory voltage comprising the arrangement defined in claim 1 and including a second input port of said digital controller, said output port being coupled to said second input port for biasing said second input port at a voltage representative of said logic threshold voltage level, means for developing an analog sensory voltage coupled to said second input port so that, when said analog sensory voltage is beyond a given voltage level, the voltage at said second input port exceeds the bias voltage at said second input port to produce the determination that the second input port is in a first logical switching state.
Claim 7
Dependent Claim
63 words
A digital comparator according to claim 5 including a resistive voltage divider coupled to said first input port and to said output port and having a divider ratio of 1:(k+1), where k is a number selected such that the average value of the voltage at said output port assumes the value of (k+1)V t where V t is the logic threshold voltage level.
Claim 8
Dependent Claim
75 words
A digital comparator according to claim 6 including means for developing a reference voltage, wherein said output port, said analog sensory voltage developing means and said reference voltage developing means are coupled to said second input port by respective resistors having relative values that result in a voltage being developed at said second input port equal to: V.sub.t +(v.sub.sense -V.sub.ref)/(k+1) where V sense is the analog sensory voltage and V ref is the reference voltage.
Claim 9
Dependent Claim
40 words
A digital comparator according to claim 7 wherein the voltage developed at said output port is a pulse-width modulated voltage having a duty-cycle that results in the average value of said pulse-width modulated voltage being equal to (k+1)V t .
Claim 10
Dependent Claim
166 words
An automatic fine tuning system for a television receiver including the apparatus defined in claim 5 and including a radio frequency stage for supplying a television radio frequency signal having a picture carrier modulated with picture information, a voltage controlled local oscillator for developing a local oscillator signal, a mixer for developing an intermediate frequency signal by heterodyning the local oscillator signal is with said radio frequency signal, said intermediate frequency siganl having a picture carrier modulated with said picture information, means under the control of said digital controller for controlling the frequency of said local oscillator and an automatic fine tuning discriminator circuit for developing the aforementioned analog sensory voltage as an automatic fine tuning voltage that represents the deviation from its nominal value of the actual frequency of the picture carrier of said intermediate frequency signal, said logic network testing the logical switching state of said second input port for controlling the operation of said local oscillator frequency control means to reduce said deviation.
Claim 11
Dependent Claim
178 words
An arrangement for developing at a first input port of a microprocessor a voltage representative of the logic threshold voltage level exhibited by the digital circuitry employed by said microprocessor to switch said input port from one logical switching state to another logical switching state, said arrangement comprising said first input port and an output port of said microprocessor, each port assuming logical switching states, and means coupled to said input and output ports for developing at said input port a voltage representative of the average value of the voltage being developed at said output port, said microprocessor being programmed to recurrently test the logical switching state of the input port and based upon such testing to switch the state of the output port to the state that is opposite that of the input port, wherein execution of said program produces a voltage at said output port having an average value that is representative of said logic threshold voltage level to enable said input port to be biased at a voltage representative of said logic threshold voltage level.
Claim 12
Dependent Claim
178 words
An arrangement for developing at a first input port of a microprocessor a voltage representative of the logic threshold voltage level exhibited by the digital circuitry employed by said microprocessor to switch said input port from one logical switching state to another logical switching state, said arrangement comprising said first input port and an output port of said microprocessor, each port assuming logical switching states, and means coupled to said input and output ports for developing at said input port a voltage representative of the average value of the voltage being developed at said output port, said microprocessor being programmed to recurrently test the logical switching state of the input port and based upon such testing to switch the state of the output port to the state that is opposite that of the input port, wherein execution of said program produces a voltage at said output port having an average value that is representative of said logic threshold voltage level to enable said input port to be biased at a voltage representative of said logic threshold voltage level.
Claim 13
Dependent Claim
143 words
A digital comparator of an analog sensory voltage comprising the arrangement defined in claim 10 and including means for developing an analog sensory voltage, means for developing a reference voltage, and a second input port of said microprocessor coupled to said output port and being biased at said logic threshold voltage level by the voltage developed at said output port, said second input port being coupled to said analog sensory voltage developing means and to said reference voltage developing means so that, when said analog sensory voltage is above said reference voltage, an interrogation by said microprocessor of the logical switching state of said second input port produces the determination that the second input port is in said one logical switching state and, when below said reference level, produces the determination that the second input port is in said another logical switching state.
Claim 14
Dependent Claim
164 words
An automatic fine tuning system for a television receiver including the apparatus defined in claim 11 and including a radio frequency stage for supplying a television radio frequency signal having a picture carrier modulated with picture information, a voltage controlled local oscillator for developing a local oscillator signal, a mixer for developing an intermediate frequency signal by heterodyning the local oscillator signal with said radio frequency signal, said intermediate frequency signal having a picture carrier modulated with said picture information, means under the control of said digital controller for controlling the frequency of said local oscillator and an automatic fine tuning discriminator circuit for developing the aforementioned analog sensory voltage as an automatic fine tuning voltage that represents the deviation from its nominal value of the actual frequency of the picture carrier of said intermediate frequency signal, said microprocessor testing the logical switching state of said second input port for controlling the operation of said local oscillator frequency control means to reduce said deviation.
Claim 15
Dependent Claim
176 words
An arrangement for developing at an output port of a logic network that has an input port a voltage that is representative of a multiple of the logic threshold voltage level exhibited by the digital circuitry employed by said network for switching said input port from one logical switching state to another logical switching state, said arrangement comprising means including a filter coupled to said output port and to said input port for developing at said input port a voltage representative of the average value of the voltage being developed at said output port, means for recurrently testing the logical switching state of said input port, and means responsive to said testing for switching the state of the output port to the state that is opposite that of the input port to thereby produce a voltage at said output port having an average value that is representative of a multiple of said logic threshold voltage level to enable said filter to develop at said input port a voltage substantially that of said logic threshold voltage level.
Claim 16
Dependent Claim
176 words
An arrangement for developing at an output port of a logic network that has an input port a voltage that is representative of a multiple of the logic threshold voltage level exhibited by the digital circuitry employed by said network for switching said input port from one logical switching state to another logical switching state, said arrangement comprising means including a filter coupled to said output port and to said input port for developing at said input port a voltage representative of the average value of the voltage being developed at said output port, means for recurrently testing the logical switching state of said input port, and means responsive to said testing for switching the state of the output port to the state that is opposite that of the input port to thereby produce a voltage at said output port having an average value that is representative of a multiple of said logic threshold voltage level to enable said filter to develop at said input port a voltage substantially that of said logic threshold voltage level.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1988-03-04 | 1988-09-03 | 1989-03-05 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1992-03-04 | 1992-09-03 | 1993-03-05 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1996-03-04 | 1996-09-03 | 1997-03-05 | $7700.00 | Window Closed / Lapsed |