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US4516143A Expired / Lapsed US ⏱️ 0.0 years remaining

Self-aligned power MOSFET with integral source-base short and methods of making

Assignee: General Electric Co
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Filing: 1984-02-13
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Granted: 1985-05-07
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Expires: 2004-02-13
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Abstract

Abstract Double diffused power MOSFET's and methods of manufacture. The source, base and drain regions of a double diffused power MOSFET correspond respectively to the emitter, base and collector of a parasitic bipolar transistor. Double diffused power MOSFET's perform better when provided with an ohmic short between the source and base regions to prevent turn-on of the parasitic bipolar transistor. In one form of ohmic short between the base and source regions, the source terminal comprises a metallic electrode, preferably aluminum, deposited over the source region, and the ohmic short comprises at least one microalloy spike extending from the source terminal metallic electrode through the source region and partly into the base region. Such microalloy spikes are formed by heating the semiconductor substrate after the metallic electrode has been deposited under appropriate conditions. In another form, a V-groove is formed by preferential etching in the source and base regions. In particular the V-groove extends through the source region, with the bottom of the V-groove extending only partly into the base region. A metallic source electrode is deposited over the source region and into the V-groove in ohmic contact with both the source and base regions to form both the source terminal and the ohmic short. These two forms of ohmic short are integral in nature, and facilitate an overall MOSFET structure and manufacturing process characterized by a minimum number of masking steps, self-alignment, and increased active device area.

Inventors

  • 👤 Robert P. Love

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-10-29 21:36
CPC Classifications
H; H10; H10D; H10D30/00; H10D30/60; H10D30/64; H10D30/66; H10D30/665; H10D30/01; H10D30/021; H10D30/028; H10D30/0291; H10D64/00; H10D64/20; H10D64/23; H10D64/251; H10D64/252; H10D64/2527; H10D64/256; H10D64/27; H10D64/311; H10D64/411; H10D64/511; H10D64/517; H10D64/518

Claims Analysis

Total Claims: 12
Claim 1
Independent Claim 209 words
A double diffused power MOSFET comprising: a semiconductor substrate including a drain region of one conductivity type and having a principal surface; a drain terminal electrically connected to said drain region; a first region of opposite conductivity type formed in said drain region to define a base region, said first region being of limited lateral extent and having a periphery terminating at said principal surface; a second region of the once conductivity type formed entirely within and of lesser lateral extent and depth than said first region to define a source region, said second region having a periphery terminating at said principal surface within and spaced from the periphery of said first region such that at said principal surface said first region exists as a band of opposite conductivity type between said source region and said drain region; a source terminal electrically connected to said second region; a gate insulating layer disposed on said principal surface at least over the band of said first region; a conductive gate electrode disposed on said gate insulating layer at least laterally over the band of said first region; a gate terminal electrically connected to said gate electrode; and an ohmic short between said first and second regions formed below said principal surface.
Claim 2
Dependent Claim 209 words
A double diffused power MOSFET comprising: a semiconductor substrate including a drain region of one conductivity type and having a principal surface; a drain terminal electrically connected to said drain region; a first region of opposite conductivity type formed in said drain region to define a base region, said first region being of limited lateral extent and having a periphery terminating at said principal surface; a second region of the once conductivity type formed entirely within and of lesser lateral extent and depth than said first region to define a source region, said second region having a periphery terminating at said principal surface within and spaced from the periphery of said first region such that at said principal surface said first region exists as a band of opposite conductivity type between said source region and said drain region; a source terminal electrically connected to said second region; a gate insulating layer disposed on said principal surface at least over the band of said first region; a conductive gate electrode disposed on said gate insulating layer at least laterally over the band of said first region; a gate terminal electrically connected to said gate electrode; and an ohmic short between said first and second regions formed below said principal surface.
Claim 3
Dependent Claim 49 words
A double diffused power MOSFET according to claim 1, wherein: said source terminal comprises a metallic electrode deposited over said second region; and said ohmic short comprises at least one microalloy spike extending from said source terminal metallic electrode through said second region and partly into said first region.
Claim 4
Dependent Claim 16 words
A double diffused power MOSFET according to claim 2, wherein said source terminal electrode comprises aluminum.
Claim 5
Dependent Claim 67 words
A double diffused power MOSFET according to claim 1, which further comprises: a V-groove in said second and first regions, the bottom of said V-groove extending only partly into said first region; and a metallic electrode deposited over said second and first regions, the bottom of said V-groove extending only partly into said first region, said metallic electrode forming both said source terminal and said ohmic short.
Claim 6
Dependent Claim 15 words
A double diffused power MOSFET according to claim 4, wherein said metallic electrode comprises aluminum.
Claim 7
Dependent Claim 263 words
A double diffused power MOSFET of the type including a multiplicity of unit cells formed on a single semiconductor substrate and electrically connected in parallel, said MOSFET comprising: a semiconductor substrate including a common drain region of one conductivity type and having a principal surface; a common drain terminal electrically connected to said drain region; a multiplicity of first regions of opposite conductivity type formed in said drain region to define respective base regions for corresponding unit cells, each of said first regions being of limited lateral extent and having a periphery terminating at said principal surface; a multiplicity of second regions of the one conductivity type formed entirely within and of lesser lateral extent and depth than corresponding first regions to define source regions for corresponding unit cells, said second regions each having a periphery terminating at said principal surface within and spaced from the periphery of the corresponding first region such that at said principal surface said corresponding first region exists as a band of the opposite conductivity type between said corresponding source region and the drain region; a common source terminal electrically connected to said second regions; a gate insulating layer disposed on said principal surface at least over the bands of said first regions; a common conductive gate electrode disposed on said gate insulating layer at least laterally over the band of said first regions; a gate terminal electrically connected to said gate electrode; and an ohmic short between said first and second regions of each of the unit cells, said ohmic shorts being formed below said principal surface.
Claim 8
Dependent Claim 263 words
A double diffused power MOSFET of the type including a multiplicity of unit cells formed on a single semiconductor substrate and electrically connected in parallel, said MOSFET comprising: a semiconductor substrate including a common drain region of one conductivity type and having a principal surface; a common drain terminal electrically connected to said drain region; a multiplicity of first regions of opposite conductivity type formed in said drain region to define respective base regions for corresponding unit cells, each of said first regions being of limited lateral extent and having a periphery terminating at said principal surface; a multiplicity of second regions of the one conductivity type formed entirely within and of lesser lateral extent and depth than corresponding first regions to define source regions for corresponding unit cells, said second regions each having a periphery terminating at said principal surface within and spaced from the periphery of the corresponding first region such that at said principal surface said corresponding first region exists as a band of the opposite conductivity type between said corresponding source region and the drain region; a common source terminal electrically connected to said second regions; a gate insulating layer disposed on said principal surface at least over the bands of said first regions; a common conductive gate electrode disposed on said gate insulating layer at least laterally over the band of said first regions; a gate terminal electrically connected to said gate electrode; and an ohmic short between said first and second regions of each of the unit cells, said ohmic shorts being formed below said principal surface.
Claim 9
Dependent Claim 54 words
A double diffused power MOSFET according to claim 6, wherein: said common source terminal comprises a metallic electrode over said second regions; and said ohmic shorts each comprise at least one microalloy spike extending from said source terminal metallic electrode through the second region and partly into the first region of each unit cell.
Claim 10
Dependent Claim 17 words
A double diffused power MOSFET according to claim 7, wherein said common source terminal electrode comprises aluminum.
Claim 11
Dependent Claim 70 words
A double diffused power MOSFET according to claim 6, which further comprises: a V-groove in each of said second and first regions, the bottom of said V-grooves extending only partly through said first regions; and a metallic electrode formed over said second regions and into said V-grooves in ohmic contact with both said second and first regions, said metallic electrode forming both said common source terminal and said ohmic shorts.
Claim 12
Dependent Claim 15 words
A double diffused power MOSFET according to claim 9, wherein said metallic electrode comprises aluminum.

References Cited (Backward Citations)

US4414560A Cited
US4407058A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1988-05-06 1988-11-05 1989-05-07 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1992-05-06 1992-11-05 1993-05-07 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 1996-05-06 1996-11-05 1997-05-07 $7700.00 Window Closed / Lapsed

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