Patent US4523369A successfully refreshed from Google Patents.
← Back to Patent Explorer
US4523369A Expired / Lapsed US ⏱️ 0.0 years remaining

Method for manufacturing a semiconductor device

Assignee: Toshiba Corp
•
Filing: 1982-09-24
•
Granted: 1985-06-18
•
Expires: 2002-09-24
📄 Original PDF 🌐 Google Patents 🔄 Sync Now

Abstract

Abstract The invention provides a method for manufacturing a semiconductor device, having the steps of: forming a first mask member which has an opening to expose a desired portion of one major surface of a semiconductor substrate; doping an impurity which has the same conductivity type as that of the semiconductor substrate through the opening of the first mask member to form an impurity region of a high concentration in the surface layer of the semiconductor substrate; forming a second mask member on the side surface of the opening of the first mask member while the first mask member is left as it is; forming a groove by selectively etching the semiconductor substrate using the first and second mask members, and at the same time leaving an impurity region of the high concentration at least on the side surface of the groove; and burying an insulating isolation material in the groove.

Inventors

  • 👤 Yoshihide Nagakubo

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-11-01 15:51
CPC Classifications
H; H10; H10P; H10P30/00; H10P30/20; H10P30/222; H10D; H10D30/00; H10D30/60; H10D62/00; H10D62/10; H10D62/102; H10D62/112; H10P30/22; H10P30/221; H10W; H10W10/00; H10W10/01; H10W10/011; H10W10/014; H10W10/0148; H10W10/10; H10W10/17; Y; Y10; Y10S; Y10S148/00; Y10S148/085

Claims Analysis

Total Claims: 8
Claim 1
Independent Claim 154 words
A method for manufacturing a semiconductor device comprising the steps of (a) forming a first mask member which has an opening to expose a desired portion of a major surface of a semiconductor substrate; (b) ion-implanting an impurity of the same conductivity type as that of said semiconductor substrate through said opening of said first mask member to form an impurity region of a high concentration in a surface layer of said semiconductor substrate; (c) substantially forming a second mask member only on a side surface of said opening of said first mask member while said first mask member is left as it is; (d) forming a groove by selectively etching said semiconductor substrate by using said first and second mask members, while at the same time leaving the impurity region of the high concentration at least on a side surface of said groove; and (e) burying an insulating isolation member in said groove.
Claim 2
Independent Claim 154 words
A method for manufacturing a semiconductor device comprising the steps of (a) forming a first mask member which has an opening to expose a desired portion of a major surface of a semiconductor substrate; (b) ion-implanting an impurity of the same conductivity type as that of said semiconductor substrate through said opening of said first mask member to form an impurity region of a high concentration in a surface layer of said semiconductor substrate; (c) substantially forming a second mask member only on a side surface of said opening of said first mask member while said first mask member is left as it is; (d) forming a groove by selectively etching said semiconductor substrate by using said first and second mask members, while at the same time leaving the impurity region of the high concentration at least on a side surface of said groove; and (e) burying an insulating isolation member in said groove.
Claim 3
Dependent Claim 32 words
The method according to claim 1, in which said step (d) comprises forming said groove such that a bottom thereof reaches the semiconductor substrate through said impurity region of the high concentration.
Claim 4
Dependent Claim 62 words
The method according to claim 2, in which said step (d) comprises, after forming said groove, ion-implanting an impurity of the same conductivity type as that of said semiconductor substrate by using said first and second mask members to form an impurity region of a high concentration on that bottom of said groove which is the surface layer of said semiconductor substrate.
Claim 5
Dependent Claim 34 words
The method according to claim 1, in which said step (d) comprises forming a groove such that a bottom thereof does not reach the semiconductor substrate with said region of the high concentration left.
Claim 6
Dependent Claim 55 words
The method according to claim 1, in which said step (b) comprises forming an impurity region of a high concentration in a surface layer of said semiconductor substrate by an ion-implantation method using an impurity dose of 1×10 13 cm -2 when the impurity concentration of said semiconductor substrate is 3×10 13 cm -3 .
Claim 7
Dependent Claim 26 words
A method according to claim 1, wherein said first mask member comprises a material selected from the group consisting of silicon dioxide, silicon nitride and aluminum.
Claim 8
Dependent Claim 22 words
A method according to claim 1, wherein said second mask member can be etched using said first mask member as a mask.

References Cited (Backward Citations)

US4140558A Cited
US4394196A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1988-06-17 1988-12-17 1989-06-18 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1992-06-17 1992-12-17 1993-06-18 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 1996-06-17 1996-12-17 1997-06-18 $7700.00 Window Closed / Lapsed

Assigned Categories & Tags

No categories assigned to this patent yet.

Assign Category Tag