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Method of making multilayer circuit board

Assignee: Sony Corp
•
Filing: 1981-12-08
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Granted: 1985-07-09
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Expires: 2001-12-08
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Abstract

Abstract A multilayer circuit board provided with multilayer wiring patterns as upper and lower multilayers is provided, in which on a first circuit board 24 with a first wiring pattern 23 formed thereon a copper foil 27 is bonded through an insulating resin layer 25, the patterning is carried out so as to form a second wiring pattern 33, and the upper and lower patterns 23 and 33 are connected to each other by conductive substance 34 filled within an opening portion 32 of the second wiring pattern 33. In accordance with this multilayer circuit board, the quality thereof is improved, the manufacturing thereof is carried out at low cost, and in addition, it becomes possible to form a circuit of high density integration.

Inventors

  • 👤 Kenji Ohsawa
  • 👤 Takao Ito
  • 👤 Masayuki Ohsawa
  • 👤 Keiji Kurata

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-10-24 22:53
CPC Classifications
H; H05; H05K; H05K3/00; H05K3/46; H05K3/4644; H05K3/4652; H05K3/4655; H05K3/0011; H05K3/0017; H05K3/002; H05K3/30; H05K3/32; H05K3/34; H05K3/3447; H05K3/3465; H05K3/3468; H05K3/40; H05K3/4038; H05K3/4076; H05K3/4602; H05K2201/00; H05K2201/01; H05K2201/0183; H05K2201/0195; H05K2201/03; H05K2201/0302; H05K2201/0305; H05K2201/0332; H05K2201/0335; H05K2201/0355; H05K2201/0358; H05K2201/09; H05K2201/09209; H05K2201/095; H05K2201/096; H05K2201/09818; H05K2201/09845; H05K2203/00; H05K2203/06; H05K2203/063; H05K2203/07; H05K2203/0756; H05K2203/0759; H05K2203/13; H05K2203/1333; H05K2203/1344; H05K3/346; H05K3/3485; Y; Y10; Y10T; Y10T29/00; Y10T29/49; Y10T29/49002; Y10T29/49117; Y10T29/49124; Y10T29/49155; Y10T29/49165

Claims Analysis

Total Claims: 9
Claim 1
Independent Claim 123 words
The method of fabricating a multilayer circuit board comprising the steps of: forming a first wiring pattern having a predetermined location for a connection portion on an insulating substrate, forming an insulating resin layer on said first wiring pattern, laminating a conductive foil with an adhesive layer to said insulating resin layer and the first wiring pattern, including said predetermined location, providing a void in said conductive foil at said predetermined location, etching said conductive foil to form a second wiring pattern, removing the adhesive layer at said predetermined location to form a passage between said first wiring pattern and said second wiring pattern, and filling the passage with a conductive substance to establish electrical continuity between said first and second wiring patterns.
Claim 2
Independent Claim 123 words
The method of fabricating a multilayer circuit board comprising the steps of: forming a first wiring pattern having a predetermined location for a connection portion on an insulating substrate, forming an insulating resin layer on said first wiring pattern, laminating a conductive foil with an adhesive layer to said insulating resin layer and the first wiring pattern, including said predetermined location, providing a void in said conductive foil at said predetermined location, etching said conductive foil to form a second wiring pattern, removing the adhesive layer at said predetermined location to form a passage between said first wiring pattern and said second wiring pattern, and filling the passage with a conductive substance to establish electrical continuity between said first and second wiring patterns.
Claim 3
Dependent Claim 23 words
A method according to claim 1 wherein the thickness of said insulating resin layer is in the range from 10 to 100 microns.
Claim 4
Dependent Claim 23 words
A method according to claim 1 wherein the thickness of said insulating resin layer is in the range from 20 to 70 microns.
Claim 5
Dependent Claim 18 words
A method according to claim 1 wherein said insulating resin is composed of an ultraviolet hardening type resin.
Claim 6
Dependent Claim 17 words
A method according to claim 1 wherein said void is provided by etching at said predetermined location.
Claim 7
Dependent Claim 25 words
A method according to claim 1 wherein said void is provided by means of using a conductive foil with an opening overlying said predetermined location.
Claim 8
Dependent Claim 19 words
A method according to claim 1 in which said laminating is carried out by applying pressure from laminating rolls.
Claim 9
Dependent Claim 26 words
A method according to claim 7 wherein said laminating is carried out by successively applying pressure from heated elastomer covered rolls and then by metal rolls.

References Cited (Backward Citations)

US2447541A Cited
US3311966A Cited
US3374129A Cited
US3846166A Cited
US4030190A Cited
US4420364A Cited
US4336100A Cited
US4383363A Cited
US4388136A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1988-07-08 1989-01-07 1989-07-09 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1992-07-08 1993-01-07 1993-07-09 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 1996-07-08 1997-01-07 1997-07-09 $7700.00 Window Closed / Lapsed

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