Pulse-width modulation circuit

Claim 2

A pulse-width modulation circuit which comprises: (a) amplifier means for amplifying an input signal inputted thereto to develop an amplified output signal from an output terminal thereof, said amplifier means having an inverting input terminal; (b) capacitor means connected between the inverting input and output terminals of said amplifier means; (c) comparator means for comparing the output signal of said amplifier means with a reference voltage to output a pulse signal, a pulse width of said pulse signal varying in accordance with a signal level of the output signal of said amplifier means; (d) delay circuit means responsive to said pulse signal for producing an output pulse signal in delayed relation to said pulse signal for a certain period of time; and (e) feedback circuit means for feeding the output pulse signal of said delay circuit means back to the inverting input terminal of said amplifier means; (f) whereby a pulse-width modulated signal having a pulse width corresponding to an amplitude of said input signal appears at an output terminal of said delay circuit means.

Claim 3

A pulse-width modulation circuit which comprises: (a) amplifier means for amplifying an input signal inputted thereto to develop an amplified output signal from an output terminal thereof, said amplifier means having an inverting input terminal; (b) capacitor means connected between the inverting input and output terminals of said amplifier means; (c) comparator means for comparing the output signal of said amplifier means with a reference voltage to output a pulse signal, a pulse width of said pulse signal varying in accordance with a signal level of the output signal of said amplifier means; (d) delay circuit means responsive to said pulse signal for producing an output pulse signal in delayed relation to said pulse signal for a certain period of time; (e) pulse amplifier means for amplifying the output pulse signal of said delay circuit means; and (f) feedback circuit means for feeding an output signal of said pulse means back to the inverting input terminal of said amplifier means; (g) whereby a pulse-width modulated signal having a pulse width corresponding to an amplitude of said input signal appears at an output terminal of said pulse amplifier means.

Claim 4

A pulse-width modulation circuit which comprises: (a) amplifier means for amplifying an input signal inputted thereto to develop an amplified output signal from an output terminal thereof, said amplifier means having an inverting input terminal; (b) capacitor means connected between the inverting input and output terminals of said amplifier means; (c) comparator means for comparing the output signal of said amplifier means with a reference voltage to output a pulse signal, a pulse width of said pulse signal varying in accordance with a signal level of the output signal of said amplifier means; (d) delay circuit means responsive to said pulse signal for producing an output pulse signal in delayed relation to said pulse signal for a certain period of time; (e) pulse amplifier means for amplifying the output pulse signal of said delay circuit means; and (f) feedback circuit means for feeding an output signal of said pulse means back to the inverting input terminal of said amplifier means; (g) whereby a pulse-width modulated signal having a pulse width corresponding to an amplitude of said input signal appears at an output terminal of said pulse amplifier means.

Claim 5

A pulse-width modulation circuit comprising: (a) amplifier means for amplifying an input signal inputted thereto to develop an amplified output signal from an output terminal thereof, said amplifier means having an inverting input terminal; (b) capacitor means connected between the inverting input and output terminals of said amplifier means; (c) inverter means comprised of a CMOS gate for converting the output signal of said amplifier means into a pulse signal, a pulse width of said pulse signal varying in accordance with a signal level of the output signal of the amplifier means; (d) delay circuit means responsive to said pulse signal for producing an output pulse signal in delayed relation to said pulse signal for a certain period of time; and (e) feedback circuit means for feeding the output pulse signal of said delay circuit means back to the inverting input terminal of said amplifier means; (f) whereby a pulse-width modulated signal having a pulse width corresponding to an amplitude of said input signal appears at an output terminal of said delay circuit means.

Claim 6

A pulse-width modulation circuit comprising: (a) amplifier means for amplifying an input signal inputted thereto to develop an amplified output signal from an output terminal thereof, said amplifier means having an inverting input terminal; (b) capacitor means connected between the inverting input and output terminals of said amplifier means; (c) inverter means comprised of a CMOS gate for converting the output signal of said amplifier means into a pulse signal, a pulse width of said pulse signal varying in accordance with a signal level of the output signal of the amplifier means; (d) delay circuit means responsive to said pulse signal for producing an output pulse signal in delayed relation to said pulse signal for a certain period of time; and (e) feedback circuit means for feeding the output pulse signal of said delay circuit means back to the inverting input terminal of said amplifier means; (f) whereby a pulse-width modulated signal having a pulse width corresponding to an amplitude of said input signal appears at an output terminal of said delay circuit means.

Claim 7

A pulse-width modulation circuit comprising: (a) amplifier means for amplifying an input signal inputted thereto to develop an amplified output signal from an output terminal thereof, said amplifier means having an inverting input terminal; (b) capacitor means connected between the inverting input and output terminals of said amplifier means; (c) inverter means comprised of a CMOS gate for converting the output signal of said amplifier means into a pulse signal, a pulse width of said pulse signal varying in accordance with a signal level of the output signal of the amplifier means; (d) delay circuit means responsive to said pulse signal for producing an output pulse signal is delayed relation to said pulse signal for a certain period of time; (e) pulse amplifier means for amplifying the output pulse signal of said delay circuit means; and (f) feedback circuit means for feeding an output signal of said pulse amplifier means back to the inverting input terminal of said amplifier means; (g) whereby a pulse-width modulated signal having a pulse width corresponding to an amplitude of said input signal appears at an output terminal of said pulse amplifier means.

Claim 8

A pulse-width modulation circuit comprising: (a) amplifier means for amplifying an input signal inputted thereto to develop an amplified output signal from an output terminal thereof, said amplifier means having an inverting input terminal; (b) capacitor means connected between the inverting input and output terminals of said amplifier means; (c) inverter means comprised of a CMOS gate for converting the output signal of said amplifier means into a pulse signal, a pulse width of said pulse signal varying in accordance with a signal level of the output signal of the amplifier means; (d) delay circuit means responsive to said pulse signal for producing an output pulse signal is delayed relation to said pulse signal for a certain period of time; (e) pulse amplifier means for amplifying the output pulse signal of said delay circuit means; and (f) feedback circuit means for feeding an output signal of said pulse amplifier means back to the inverting input terminal of said amplifier means; (g) whereby a pulse-width modulated signal having a pulse width corresponding to an amplitude of said input signal appears at an output terminal of said pulse amplifier means.

Claim 9

A pulse-width modulation circuit comprising: (a) amplifier means for amplifying an input signal inputted thereto to develop an amplified output signal from an output terminal thereof, said amplifier means having an inverting input terminal; (b) capacitor means connected between the inverting input and output terminal of said amplifier means; (c) comparator means for comparing the output signal of said amplifier means with a reference voltage to output a pulse signal, a pulse width of said pulse signal varying in accordance with a signal level of the output signal of the amplifier means; (d) pulse amplifier means for amplifying the pulse signal outputted from said comparator means, said pulse amplifier means outputting an amplified pulse signal in a delayed relation to said pulse signal for a certain period of time; and (e) feedback circuit means for feeding the output pulse signal of said pulse amplifier means back to the inverting input terminal of said amplifier means; (f) whereby a pulse-width modulated signal having a pulse width corresponding to an amplitude of said input signal appears at an output terminal of said pulse amplifier means.

Claim 10

A pulse-width modulation circuit comprising: (a) amplifier means for amplifying an input signal inputted thereto to develop an amplified output signal from an output terminal thereof, said amplifier means having an inverting input terminal; (b) capacitor means connected between the inverting input and output terminal of said amplifier means; (c) comparator means for comparing the output signal of said amplifier means with a reference voltage to output a pulse signal, a pulse width of said pulse signal varying in accordance with a signal level of the output signal of the amplifier means; (d) pulse amplifier means for amplifying the pulse signal outputted from said comparator means, said pulse amplifier means outputting an amplified pulse signal in a delayed relation to said pulse signal for a certain period of time; and (e) feedback circuit means for feeding the output pulse signal of said pulse amplifier means back to the inverting input terminal of said amplifier means; (f) whereby a pulse-width modulated signal having a pulse width corresponding to an amplitude of said input signal appears at an output terminal of said pulse amplifier means.

Claim 11

A pulse-width modulation circuit according to claim 5, in which said pulse amplifier means comprises a logical gate element.

Claim 12

A pulse-width modulation circuit comprising: (a) amplifier means for amplifying an input signal inputted thereto to develop an amplified output signal from an output terminal thereof, said amplifier means having an inverting input terminal; (b) capacitor means connected between the inverting input and output terminals of said amplifier means; (c) inverter means comprised of a CMOS gate for converting the output signal of said amplifier means into a pulse signal, a pulse with of said pulse signal varying in accordance with a signal level of the output signal of the amplifier means; (d) pulse amplifier means for amplifying the pulse signal outputted from said inverter means, said pulse amplifier means outputting an amplified pulse signal in a delayed relation to said pulse signal for a certain period of time; and (e) feedback circuit means for feeding the output pulse signal of said pulse amplifier means back to the inverting input terminal of said amplifier means; (f) whereby a pulse-width modulated signal having a pulse width corresponding to an amplitude of said input signal appears at an output terminal of said pulse amplifier means.

Claim 13

A pulse-width modulation circuit comprising: (a) amplifier means for amplifying an input signal inputted thereto to develop an amplified output signal from an output terminal thereof, said amplifier means having an inverting input terminal; (b) capacitor means connected between the inverting input and output terminals of said amplifier means; (c) inverter means comprised of a CMOS gate for converting the output signal of said amplifier means into a pulse signal, a pulse with of said pulse signal varying in accordance with a signal level of the output signal of the amplifier means; (d) pulse amplifier means for amplifying the pulse signal outputted from said inverter means, said pulse amplifier means outputting an amplified pulse signal in a delayed relation to said pulse signal for a certain period of time; and (e) feedback circuit means for feeding the output pulse signal of said pulse amplifier means back to the inverting input terminal of said amplifier means; (f) whereby a pulse-width modulated signal having a pulse width corresponding to an amplitude of said input signal appears at an output terminal of said pulse amplifier means.

Claim 14

A pulse-width modulation circuit according to claim 7, in which said pulse amplifier means comprises output-stage switching elements, and an on-off timing control circuit for deactivating said output-stage switching elements for a certain period of time.

Claim 15

A pulse-width modulation circuit according to any one of claims 1, 2, 3, 4, 5 and 7, in which said amplifier means further comprises a non-inverting input terminal and non-inversely amplifies said input signal applied to said non-inverting input terminal.

Claim 16

A pulse-width modulation circuit according to any one of claims 1, 2, 3, 4, 5 and 7, in which said amplifier means further comprises a non-inverting input terminal and inversely amplifies said input signal applied to said inverting input terminal, said non-inverting input terminal being grounded.

Claim 17

A pulse-width modulation circuit according to any one of claims 1, 2, 3, 4, 5 and 7, in which said amplifier means comprises an inverter composed of a CMOS gate.

Claim 18

A pulse-width modulation circuit according to any one of claims 1, 2, 3, 4, 5 and 7, in which said capacitor means comprises two capacitors serially connected between the inverting input and output terminals of said amplifier means, a junction point of said two capacitors being grounded through a resistor.