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US4549338A
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US
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Method of fabricating an IC including electro-optical transmitters and receivers
Assignee: Harris Corp
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Filing: 1983-11-18
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Granted: 1985-10-29
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Expires: 2003-11-18
Abstract
Abstract An integrated circuit having active devices in electro-optical conversion material regions and single crystal silicon regions which are in a polycrystalline silicon support. The electro-optical conversion material regions are separated from the polycrystalline silicon by a containment layer. The method includes forming trenches in a wafer of electro-optical conversion material, covering the trenches with a containment layer and overfilling with polycrystalline silicon, removing material to expose polycrystalline silicon in the trenches and converting exposed portions of the polycrystalline silicon to single crystal silicon.
Inventors
- 👤 Robert J. Abend
- 👤 C. Byron Shelton, Jr.
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-29 08:19
CPC Classifications
H; H10; H10P; H10P14/00; H10P14/20; H10P14/29; H10P14/2901; H10P14/2907; H10P14/2909; H10P14/2911; H10P14/2924; H10P14/2925; H10P14/32; H10P14/3202; H10P14/3238; H10P14/34; H10P14/3402; H10P14/3404; H10P14/3411; H10P14/3451; H10P14/3452; H10P14/3458; H10P14/38; H10P14/3802; H10P14/3808; H10P14/3816; H10P14/382; H10P34/00; H10P34/40; H10P34/42; H10W; H10W10/00; H10W10/01; H10W10/011; H10W10/10; Y; Y10; Y10S; Y10S148/00; Y10S148/05
Claims Analysis
Total Claims: 8
Claim 1
Independent Claim
101 words
A method of fabricating an integrated circuit comprising: forming trenches in a first surface of a wafer of electro-optical transmitting material; covering said first surface and trenches with a containment layer to prevent diffusion of impurities from said electro-optical transmitting material during subsequent steps; overfilling said trenches with polycrystalline silicon material; removing material from a second surface of said wafer opposite said first surface to a level exposing said polycrystalline silicon in said trenches; converting exposed portions of said polycrystalline silicon to single crystal silicon; and forming active devices in exposed portions of said electro-optical transmitting material and single crystal silicon.
Claim 2
Independent Claim
101 words
A method of fabricating an integrated circuit comprising: forming trenches in a first surface of a wafer of electro-optical transmitting material; covering said first surface and trenches with a containment layer to prevent diffusion of impurities from said electro-optical transmitting material during subsequent steps; overfilling said trenches with polycrystalline silicon material; removing material from a second surface of said wafer opposite said first surface to a level exposing said polycrystalline silicon in said trenches; converting exposed portions of said polycrystalline silicon to single crystal silicon; and forming active devices in exposed portions of said electro-optical transmitting material and single crystal silicon.
Claim 3
Dependent Claim
15 words
A method according to claim 1 wherein said electro-optical material is a compound of gallium.
Claim 4
Dependent Claim
25 words
A method according to claim 1 including forming conductors between said active devices in said electro-optical transmitting material and devices in said single crystal silicon.
Claim 5
Dependent Claim
39 words
The method according to claim 1 including covering exposed surfaces of said electro-optical transmitting material with a top containment layer to prevent diffusion of impurities from said electro-optical transmitting material during device formation in said single crystal silicon steps.
Claim 6
Dependent Claim
14 words
The method according to claim 4 wherein said top containment layer is silicon nitride.
Claim 7
Dependent Claim
29 words
The method according to claim 1 wherein said converting step includes applying a laser to selected areas of said polycrystalline silicon to refine it to a single crystal structure.
Claim 8
Dependent Claim
15 words
The method according to claim 1 wherein said containment layer is a compound of silicon.
References Cited (Backward Citations)
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1988-10-28 | 1989-04-29 | 1989-10-29 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1992-10-28 | 1993-04-29 | 1993-10-29 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1996-10-28 | 1997-04-29 | 1997-10-29 | $7700.00 | Window Closed / Lapsed |