Resist process using anti-reflective coating

Claim 2

An integrated circuit patterning process comprising the steps of: providing a substrate having partially formed integrated circuit structures on the top surface thereof; depositing a first photoresist material over the top surface of said substrate, said first photoresist material being deposited to provide a substantially planar surface; depositing an anti-reflective coating over said first photoresist material; and depositing a second photoresist material over said anti-reflective material; and exposing said second photoresist material to patterned optical illumination in a predetermined pattern.

Claim 3

The process of claim 1, wherein said first photoresist material is photosensitive at a first wavelength to which said second photoresist material is opaque, and wherein said anti-reflective material is opaque at a second wavelength to which said second photoresist layer is sensitive.

Claim 4

The process of claim 1, wherein said first photoresist material consists essentially of PMMA (polymethylmethacrylate).

Claim 5

The process of claim 2, further comprising the subsequent step of: exposing said second photoresist material to patterned optical illumination at said second wavelength in a predetermined pattern; developing said second photoresist material, so that said second photoresist material is removed in areas determined by said predetermined pattern; illuminating said first photoresist material at said first wavelength; and developing said first photoresist.

Claim 6

The process of claim 4, wherein said step of developing said second photoresist material also removes accessible portions of said anti-reflective material.

Claim 7

The process of claim 1, wherein said anti-reflective coating does not react with said first or second photoresist materials to form an insoluble or opaque additional layer.

Claim 8

The process of claim 1, wherein said anti-reflective coating is adherent to said first photoresist material, and said second photoresist material is adherent to said anti-reflective coating.

Claim 9

The process of claim 1, wherein said first and second photoresist materials have respective compositions such that said second photoresist material can be developed in a solvent which will not erode said first photoresist material.

Claim 10

The process of claim 1, wherein said first and second photoresist materials have respective compositions such that said first photoresist material can be developed in a solvent which will not erode said second photoresist material.

Claim 11

The process of claim 9, wherein said first and second photoresist materials have respective compositions such that said first photoresist material can be developed in a solvent which will not erode said second photoresist material.

Claim 12

The process of claim 2, wherein said first wavelength comprises a wavelength shorter than 300 nm.

Claim 13

The process of claim 2, wherein said second wavelength comprises a wavelength longer than 300 nm.

Claim 14

The process of claim 2, wherein said anti-reflective coating is deposited to a substantially uniform thickness between 1000 and 2500 Angstroms.

Claim 15

The process of claim 1, wherein said first photoresist material is deposited to a minimum thickness in the range between 0.5 and 5 microns.

Claim 16

The process of claim 1, wherein said second photoresist material is deposited to a substantially uniform thickness of less than 1 micron.

Claim 17

The process of claim 1, further comprising the additional step, before deposition of said anti-reflective coating, of baking said first photoresist material at a temperature below 300 C., whereby said first photoresist material is further planarized.

Claim 18

The process of claim 1, wherein said anti-reflective coating and said first photoresist material have respective compositions such that said anti-reflective coating is removable under conditions which will not remove said first photoresist material.

Claim 19

The process of claim 1, wherein said second and first photoresist materials have respective compositions such that said second photoresist material is removable under conditions which will not remove said first photoresist material.

Claim 20

The process of claim 1, wherein said anti-reflective photoresist material is removable under conditions which will also develop said second photoresist material.

Claim 21

An integrated circuit selective etching process comprising the steps of: providing a substrate having partially formed integrated circuit structures on the top surface thereof; depositing a first photoresist material over the top surface of said substrate, said first photoresist material being deposited to provide a substantially planar surface; depositing an anti-reflective coating over said first photoresist material; and depositing a second photoresist material over said anti-reflective material; wherein said first photoresist material is photosensitive at a first wavelength to which said second photoresist material is opaque, and wherein said anti-reflective material is opaque at a second wavelength to which said second photoresist layer is sensitive; exposing said second photoresist material to patterned optical illumination at said second wavelength in a predetermined pattern; developing said second photoresist material, so that said second photoresist material is removed in areas determined by said predetermined pattern; illuminating said first photoresist material at said first wavelength; developing said first photoresist; and exposing said integrated circuit structure to a predetermined etchant, whereby portions of said top layer exposed by said first photoresist layer are etched and portions of said top layer which are overlaid by remaining portions of said first photoresist layer are not substantially etched.

Claim 22

An integrated circuit selective etching process comprising the steps of: providing a substrate having partially formed integrated circuit structures on the top surface thereof; depositing a first photoresist material over the top surface of said substrate, said first photoresist material being deposited to provide a substantially planar surface; depositing an anti-reflective coating over said first photoresist material; and depositing a second photoresist material over said anti-reflective material; wherein said first photoresist material is photosensitive at a first wavelength to which said second photoresist material is opaque, and wherein said anti-reflective material is opaque at a second wavelength to which said second photoresist layer is sensitive; exposing said second photoresist material to patterned optical illumination at said second wavelength in a predetermined pattern; developing said second photoresist material, so that said second photoresist material is removed in areas determined by said predetermined pattern; illuminating said first photoresist material at said first wavelength; developing said first photoresist; and exposing said integrated circuit structure to a predetermined etchant, whereby portions of said top layer exposed by said first photoresist layer are etched and portions of said top layer which are overlaid by remaining portions of said first photoresist layer are not substantially etched.

Claim 23

The process of claim 20, wherein said first photoresist material is resistant to said predetermined etchant.

Claim 24

The process of claim 20, wherein said second photoresist material is resistant to said predetermined etchant.

Claim 25

The process of claim 21, wherein said second photoresist material is resistant to said predetermined etchant.

Claim 26

The process of claim 20, wherein said anti-reflective coating does not react with said first or second photoresist materials to form an insoluble or opaque additional layer.

Claim 27

The process of claim 20, wherein said anti-reflective coating is adherent to said first photoresist material, and said second photoresist material is adherent to said anti-reflective coating.

Claim 28

The process of claim 20, wherein said first and second photoresist materials have respective compositions such that said second photoresist material can be developed in a solvent which will not erode said first photoresist material.

Claim 29

The process of claim 20, wherein said first and second photoresist materials have respective compositions such that said first photoresist material can be developed in a solvent which will not erode said second photoresist material.

Claim 30

The process of claim 20, wherein said first wavelength comprises a wavelength shorter than 290 nm.

Claim 31

The process of claim 20, wherein said second wavelength comprises a wavelength longer than 290 nm.

Claim 32

The process of claim 20, wherein said anti-reflective coating is deposited to a substantially uniform thickness between 800 and 2500 Angstroms.

Claim 33

The process of claim 20, wherein said first photoresist material is deposited to a minimum thickness in the range between 0.4 and 5 microns.

Claim 34

The process of claim 20, wherein said second photoresist material is deposited to a substantially uniform thickness of less than 0.8 micron.

Claim 35

The process of claim 20, further comprising the additional step, before deposition of said anti-reflective coating, of baking said first photoresist material at a temperature in the range between 260 and 290 C., whereby said first photoresist material is further planarized.

Claim 36

The process of claim 20, wherein said anti-reflective coating and said first photoresist material have respective compositions such that said anti-reflective coating is removable under conditions which will not remove said first photoresist material.

Claim 37

The process of claim 20, wherein said second and first photoresist materials have respective compositions such that said second photoresist material is removable under conditions which will not remove said first photoresist material.

Claim 38

The process of claim 20, wherein said anti-reflective photoresist material is removable under conditions which will also develop said second photoresist material.

Claim 39

An integrated circuit selective lift-off deposition process comprising the steps of: providing a substrate having partially formed integrated circuit structures on the top surface thereof; depositing a first photoresist material over the top surface of said substrate, said first photoresist material being deposited to provide a substantially planar surface; depositing an anti-reflective coating over said first photoresist material; and depositing a second photoresist material over said anti-reflective material; wherein said first photoresist material is photosensitive at a first wavelength to which said second photoresist material is opaque, and wherein said anti-reflective material is opaque at a second wavelength to which said second photoresist layer is sensitive; exposing said second photoresist material to patterned optical illumination at said second wavelength in a predetermined pattern; developing said second photoresist material, so that said second photoresist material is removed in areas determined by said predetermined pattern; illuminating said first photoresist material at said first wavelength; developing said first photoresist; depositing a thin film of a predetermined material overall; and removing remaining portions of said photoresist layers, whereby said predetermined material remains on portions of said top layer which had been exposed by said developed first photoresist layer in said predetermined pattern and does not substantially remain on other portions of said top layer.

Claim 40

An integrated circuit selective lift-off deposition process comprising the steps of: providing a substrate having partially formed integrated circuit structures on the top surface thereof; depositing a first photoresist material over the top surface of said substrate, said first photoresist material being deposited to provide a substantially planar surface; depositing an anti-reflective coating over said first photoresist material; and depositing a second photoresist material over said anti-reflective material; wherein said first photoresist material is photosensitive at a first wavelength to which said second photoresist material is opaque, and wherein said anti-reflective material is opaque at a second wavelength to which said second photoresist layer is sensitive; exposing said second photoresist material to patterned optical illumination at said second wavelength in a predetermined pattern; developing said second photoresist material, so that said second photoresist material is removed in areas determined by said predetermined pattern; illuminating said first photoresist material at said first wavelength; developing said first photoresist; depositing a thin film of a predetermined material overall; and removing remaining portions of said photoresist layers, whereby said predetermined material remains on portions of said top layer which had been exposed by said developed first photoresist layer in said predetermined pattern and does not substantially remain on other portions of said top layer.

Claim 41

The process of claim 37, wherein said first photoresist material consists essentially of PMMA (polymethylmethacrylate).

Claim 42

The process of claim 37, wherein said step of developing said second photoresist material also removes exposed portions of said anti-reflective material.

Claim 43

The process of claim 37, wherein said anti-reflective coating does not react with said first or second photoresist materials to form an insoluble or opaque additional layer.

Claim 44

The process of claim 37, wherein said anti-reflective coating is adherent to said first photoresist material, and said second photoresist material is adherent to said anti-reflective coating.

Claim 45

The process of claim 37, wherein said first and second photoresist materials have respective compositions such that said second photoresist material can be developed in a solvent which will not erode said first photoresist material.

Claim 46

The process of claim 37, wherein said first and second photoresist materials have respective compositions such that said first photoresist material can be developed in a solvent which will not erode said second photoresist material.

Claim 47

The process of claim 37, wherein said first photoresist material is deposited to a minimum thickness in the range between 1.5 and 5 microns.

Claim 48

The process of claim 44, wherein said second photoresist material is deposited to a substantially uniform thickness of less than 1.1 micron.

Claim 49

The process of claim 44, further comprising the additional step, before deposition of said anti-reflective coating, of baking said first photoresist material at a low temperature, whereby said first photoresist material is further planarized.

Claim 50

An integrated circuit selective ion implantation process comprising the steps of: providing a substrate having partially formed integrated circuit structures on the top surface thereof: depositing a first photoresist material over the top surface of said substrate, said first photoresist material being deposited to provide a substantially planar surface; depositing an anti-reflective coating over said first photoresist material; and depositing a second photoresist material over said anti-reflective material; wherein said first photoresist material is photosensitive at a first wavelength to which said second photoresist material is opaque, and wherein said anti-reflective material is opaque at a second wavelength to which said second photoresist layer is sensitive; exposing said second photoresist material to patterned optical illumination at said second wavelength in a predetermined pattern; developing said second photoresist material, so that said second photoresist material is removed in areas determined by said predetermined pattern; illuminating said first photoresist material at said first wavelength; developing said first photoresist; and implanting a desired dose of at least one predetermined ion species at a predetermined energy, whereby said desired dose is at least partially stopped by remaining portions of said photoresist materials to provide patterned ion implantation.

Claim 51

An integrated circuit selective ion implantation process comprising the steps of: providing a substrate having partially formed integrated circuit structures on the top surface thereof: depositing a first photoresist material over the top surface of said substrate, said first photoresist material being deposited to provide a substantially planar surface; depositing an anti-reflective coating over said first photoresist material; and depositing a second photoresist material over said anti-reflective material; wherein said first photoresist material is photosensitive at a first wavelength to which said second photoresist material is opaque, and wherein said anti-reflective material is opaque at a second wavelength to which said second photoresist layer is sensitive; exposing said second photoresist material to patterned optical illumination at said second wavelength in a predetermined pattern; developing said second photoresist material, so that said second photoresist material is removed in areas determined by said predetermined pattern; illuminating said first photoresist material at said first wavelength; developing said first photoresist; and implanting a desired dose of at least one predetermined ion species at a predetermined energy, whereby said desired dose is at least partially stopped by remaining portions of said photoresist materials to provide patterned ion implantation.

Claim 52

The process of claim 47, further comprising the subsequent step of driving in said implanted ions.

Claim 53

The process of claim 47, wherein said anti-reflective coating is adherent to said first photoresist material, and said second photoresist material is adherent to said anti-reflective coating.

Claim 54

The process of claim 47, wherein said first and second photoresist materials have respective compositions such that said second photoresist material can be developed in a solvent which will not erode said first photoresist material.

Claim 55

The process of claim 47, wherein said first and second photoresist materials have respective compositions such that said first photoresist material can be developed in a solvent which will not erode said second photoresist material.

Claim 56

The process of claim 47, wherein said first and second photoresist materials have respective compositions such that said first photoresist material can be developed in a solvent which will not erode said second photoresist material.

Claim 57

The process of claim 47, wherein said first wavelength comprises a wavelength shorter than 265 nm.

Claim 58

The process of claim 47, wherein said second wavelength comprises a wavelength longer than 300 nm.

Claim 59

The process of claim 47, wherein said anti-reflective coating is deposited to a substantially uniform thickness between 1000 and 2000 Angstroms.

Claim 60

The process of claim 47, wherein said first photoresist material is deposited to a minimum thickness in the range between 0.75 and 5 microns.

Claim 61

The process of claim 47, wherein said second photoresist material is deposited to a substantially uniform thickness of less than 0.7 micron.

Claim 62

An integrated circuit metallization process comprising the steps of: providing a substrate having partially formed integrated circuit structures on the top surface thereof; etching contact holes in predetermined locations; depositing a thin film of a metal overall on said top surface; depositing a first photoresist material over said metal film, said first photoresist material being deposited to provide a substantially planar surface; depositing an anti-reflective coating over said first photoresist material; and depositing a second photoresist material over said anti-reflective material; wherein said first photoresist material is photosensitive at a first wavelength to which said second photoresist material is opaque, and wherein said anti-reflective material is opaque at a second wavelength to which said second photoresist layer is sensitive; exposing said second photoresist material to patterned optical illumination at said second wavelength in a predetermined pattern; developing said second photoresist material, so that said second photoresist material is removed in areas determined by said predetermined pattern; illuminating said first photoresist material at said first wavelength; developing said first photoresist; and exposing said integrated circuit structure to a predetermined metal etchant plasma, whereby portions of said metal film exposed by said first photoresist layer are etched and portions of said metal film which are overlaid by remaining portions of said first photoresist layer are not substantially etched.

Claim 63

An integrated circuit metallization process comprising the steps of: providing a substrate having partially formed integrated circuit structures on the top surface thereof; etching contact holes in predetermined locations; depositing a thin film of a metal overall on said top surface; depositing a first photoresist material over said metal film, said first photoresist material being deposited to provide a substantially planar surface; depositing an anti-reflective coating over said first photoresist material; and depositing a second photoresist material over said anti-reflective material; wherein said first photoresist material is photosensitive at a first wavelength to which said second photoresist material is opaque, and wherein said anti-reflective material is opaque at a second wavelength to which said second photoresist layer is sensitive; exposing said second photoresist material to patterned optical illumination at said second wavelength in a predetermined pattern; developing said second photoresist material, so that said second photoresist material is removed in areas determined by said predetermined pattern; illuminating said first photoresist material at said first wavelength; developing said first photoresist; and exposing said integrated circuit structure to a predetermined metal etchant plasma, whereby portions of said metal film exposed by said first photoresist layer are etched and portions of said metal film which are overlaid by remaining portions of said first photoresist layer are not substantially etched.

Claim 64

The process of claim 58, wherein said first photoresist material is resistant to said predetermined metal etchant.

Claim 65

The process of claim 58, wherein said second photoresist material is resistant to said predetermined metal etchant.

Claim 66

The process of claim 58, further comprising the subsequent step, after said metal etching step, of removing all remaining portions of said photoresist materials.