US4560419A
Expired / Lapsed
US
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Method of making polysilicon resistors with a low thermal activation energy
Assignee: Inmos Corp
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Filing: 1984-05-30
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Granted: 1985-12-24
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Expires: 2004-05-30
Abstract
Abstract An improved process in making a polysilicon resistor suitable for use as a load resistor in a static memory wherein after the doping of the polysilicon, the device is annealed by exposing it to a rapid increase of ambient temperature (up to between 900° and 1200° C.), maintaining the high ambient temperature for a controlled time (about 5 seconds) and then lowering the ambient temperature at a rapid rate. This decreases resistance by one order of magnitude and significantly decreases the temperature activation energy of the resistor. This permits static memory cells to retain data even though the cell has high leakage currents, thereby improving final test yields.
Inventors
- 👤 Ronald R. Bourassa
- 👤 Douglas B. Butler
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-29 02:18
CPC Classifications
H; H10; H10B; H10B10/00; H10B10/15; H10P; H10P95/00; H10P95/90; H10D; H10D1/00; H10D1/40; H10D1/47; H10P14/00; H10P14/40; H10P14/416; H10P32/00; H10P32/30; H10P32/302; H10P34/00; H10P34/40; H10P34/42; H10P34/422; Y; Y10; Y10S; Y10S257/00; Y10S257/903; Y10S257/904
Claims Analysis
Total Claims: 23
Claim 1
Independent Claim
77 words
A method for fabricating a resistor in polysilicon for a semiconductor integrated circuit comprising: doping a first region of polysilicon with one electrical type of doping impurity; doping a second region of polysilicon adjacent to said first region with the other electrical type of doping impurity to form a polysilicon structure with first and second regions; and lowering the resistivity and thermal activation energy of the polysilicon structure below 0.20 eV by heat treating the polysilicon structure.
Claim 2
Independent Claim
77 words
A method for fabricating a resistor in polysilicon for a semiconductor integrated circuit comprising: doping a first region of polysilicon with one electrical type of doping impurity; doping a second region of polysilicon adjacent to said first region with the other electrical type of doping impurity to form a polysilicon structure with first and second regions; and lowering the resistivity and thermal activation energy of the polysilicon structure below 0.20 eV by heat treating the polysilicon structure.
Claim 3
Dependent Claim
14 words
The method according to claim 1 wherein said heat treating step comprises rapid annealing.
Claim 4
Dependent Claim
43 words
The improvement according to claim 1 wherein said heat treating step comprises subjecting the polysilicon structure to a rapid change in ambient temperature up to greater than 900° but less than about 1200° C., and maintaining the ambient temperature for about 5 seconds.
Claim 5
Dependent Claim
27 words
The method according to claim 2 wherein said annealing step comprises rapid thermal annealing by exposing the polysilicon to an anneal temperature of about 1100 degrees centigrade.
Claim 6
Dependent Claim
36 words
The method according to claim 2, said annealing comprising rapidly heating the device by exposure of the polysilicon to high intensity radiation, maintaining a high ambient temperature, and then turning off the source of said radiation.
Claim 7
Dependent Claim
54 words
The method of claim 2 including, prior to said annealing step, forming a polysilicon structure having a first region of polysilicon doped with one type of impurity and second and third regions of polysilicon doped with the other type of impurity, said first region being adjacent to and contacting said second and third regions.
Claim 8
Dependent Claim
17 words
The method of claim 6 wherein said first region is located between said second and third regions.
Claim 9
Dependent Claim
28 words
The method of claim 6 including doping a poly layer with one type of impurity, defining the resistor area, and selectively doping with the other type of impurity.
Claim 10
Dependent Claim
15 words
The method of claim 6 wherein said annealing step comprises rapidly annealing said poly regions.
Claim 11
Dependent Claim
18 words
The method of claim 6 including doping said first region with both p type and n type impurities.
Claim 12
Dependent Claim
19 words
The method of claim 7 including establishing said first, second and third poly regions to form back-to-back polysilicon diodes.
Claim 13
Dependent Claim
48 words
The method of claim 8 including doping a poly layer with the type of impurity for said first region of poly, then defining the poly which is to act as the resistor, the selectively doping said second and third regions of poly with the other type of impurity.
Claim 14
Dependent Claim
14 words
The method of claim 12 wherein the dopant of said first region comprises boron.
Claim 15
Dependent Claim
12 words
The method of claim 9 wherein said annealing step comprises heat pulsing.
Claim 16
Dependent Claim
32 words
The method of claim 9 further including permitting the polysilicon to cool after said annealing by quickly decreasing the application of heat or other form of energy being used for said annealing.
Claim 17
Independent Claim
73 words
A method for fabricating a polysilicon resistor for a semiconductor integrated circuit including: doping a middle region of polysilicon with one electrical type of impurity; doping lateral regions of polysilicon in contact with and adjacent to said middle region with the other electrical type of impurity; and lowering the thermal activation energy of the structure below 0.20 eV by radiating said regions of polysilicon with radiant energy applied by a high intensity source.
Claim 18
Independent Claim
73 words
A method for fabricating a polysilicon resistor for a semiconductor integrated circuit including: doping a middle region of polysilicon with one electrical type of impurity; doping lateral regions of polysilicon in contact with and adjacent to said middle region with the other electrical type of impurity; and lowering the thermal activation energy of the structure below 0.20 eV by radiating said regions of polysilicon with radiant energy applied by a high intensity source.
Claim 19
Dependent Claim
14 words
The method of claim 16 where said high intensity source comprises a heat lamp.
Claim 20
Dependent Claim
14 words
The method of claim 16 wherein said high intensity source comprises a graphite heater.
Claim 21
Dependent Claim
58 words
The method of claim 16 wherein said doping of a middle region comprises doping to achieve a concentration therein below about 2.22×10 20 atoms per cubic centimeter and wherein said lowering step lowers the thermal activation energy defined by a monotonic curve wherein the activation energy at 2.22×10 19 atoms per cubic centimeter concentration is below 0.20 eV.
Claim 22
Dependent Claim
47 words
The method of claim 16 wherein said method provides a resistor having a thermal activation energy which is lower than that of a back-to-back boron diode in polysilicon doped to the same concentration, over a range of about 2×10 18 to 2×10 19 atoms per cubic centimeter.
Claim 23
Dependent Claim
42 words
The method of claim 19 wherein said curve has a thermal activation energy of about 0.13 eV at a concentration of 2.22×10 19 atoms per cubic centimeter and about 0.32 eV at a concentration of about 2.22×10 18 atoms per cubic centimeter.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1988-12-23 | 1989-06-24 | 1989-12-24 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1992-12-23 | 1993-06-24 | 1993-12-24 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1996-12-23 | 1997-06-24 | 1997-12-24 | $7700.00 | Window Closed / Lapsed |