Supply voltage level independent clock generator

Claim 2

A clock generator connected to a power supply and adapted to receive an input signal and provide a clock output signal of a predetermined delay time with respect to the input signal applied thereto, said clock generator comprising: a delay circuit responsive to said input signal to provide a delay signal of a predetermined delay time; said delay circuit including at least one constant-resistance transistor supplied at its control electrode with a constant voltage independent of variations in the power supply voltage and exhibiting an ON resistance independent of said power supply voltage, said constant-resistance transistor serving to make the predetermined delay time of said delay signal substantially independent of variations in said power supply voltage, and a drive circuit operatively connected to said delay circuit to provide said clock output signal.

Claim 3

A clock generator connected to a power supply and adapted to receive an input signal and provide a clock output signal of a predetermined delay time with respect to the input signal applied thereto, said clock generator comprising: a delay circuit responsive to said input signal to provide a delay signal of a predetermined delay time; said delay circuit having at least one constant-resistance transistor supplied at its control electrode with a constant voltage independent of variations in the power supply voltage and exhibiting an ON resistance independent of said power supply voltage, said constant-resistance transistor serving to make the delay time of said delay signal substantially independent of variations in said power supply voltage, and a drive circuit operatively connected to said delay circuit to provide said clock output signal; wherein said delay circuit comprises: a first series connection including a first constant-resistance transistor and a first transistor, one end of said first series connection being connected to said power supply and a control electrode of said first transistor being supplied with said input signal; a second transistor connected at a second junction between the other end of said series connection and a reference potential; a third transistor having an electrode connected to said power supply; and a second series connection including a second constant-resistance transistor and a fourth transistor, said second series connection being connected at a first junction between another electrode of said third transistor and said reference potential and a control electrode of said fourth transistor being connected to the other end of said first series connection, wherein said delay signal is delivered from the first junction of said third transistor and said second series connection.

Claim 4

A clock generator connected to a power supply and adapted to receive an input signal and provide a clock output signal of a predetermined delay time with respect to the input signal applied thereto, said clock generator comprising: a delay circuit responsive to said input signal to provide a delay signal of a predetermined delay time; said delay circuit having at least one constant-resistance transistor supplied at its control electrode with a constant voltage independent of variations in the power supply voltage and exhibiting an ON resistance independent of said power supply voltage, said constant-resistance transistor serving to make the delay time of said delay signal substantially independent of variations in said power supply voltage, and a drive circuit operatively connected to said delay circuit to provide said clock output signal; wherein said delay circuit comprises: a first series connection including a first constant-resistance transistor and a first transistor, one end of said first series connection being connected to said power supply and a control electrode of said first transistor being supplied with said input signal; a second transistor connected at a second junction between the other end of said series connection and a reference potential; a third transistor having an electrode connected to said power supply; and a second series connection including a second constant-resistance transistor and a fourth transistor, said second series connection being connected at a first junction between another electrode of said third transistor and said reference potential and a control electrode of said fourth transistor being connected to the other end of said first series connection, wherein said delay signal is delivered from the first junction of said third transistor and said second series connection.

Claim 5

A clock generator according to claim 2 wherein the ON resistance of said first constant-resistance transistor is sufficiently higher than the ON resistance of said first transistor and/or the ON resistance of said second constant-resistance transistor is sufficiently higher than the ON resistance of said fourth transistor such that charging of the second junction and/or discharging of said first junction is determined by only the ON resistance(s) of said first and/or second constant-resistance transistors, respectively.

Claim 6

A clock generator connected to a power supply and adapted to receive an input signal and provide a clock output signal of a predetermined delay time with respect to the input signal applied thereto, said clock generator comprising: a delay circuit responsive to said input signal to provide a delay signal of a predetermined delay time; said delay circuit having at least one constant-resistance transistor supplied at its control electrode with a constant voltage independent of variations in the power supply voltage and exhibiting an ON resistance independent of said power supply voltage, said constant-resistance serving to make the delay time of said delay signal substantially independent of variations in said power supply voltage, and a drive circuit operatively connected to said delay circuit to provide said clock output signal; wherein said delay circuit comprises: a first transistor having an electrode connected to said power supply and a control electrode to which said input signal is applied; a second transistor connected between another electrode of said first transistor and a reference potential; a third transistor having an electrode connected to said power supply; a fourth transistor connected between another electrode of said third transistor and said reference potential; a first constant-resistance transistor connected between said another electrode of said first transistor and a control electrode of said fourth transistor; and a second constant-resistance transistor having an electrode connected to a junction of said third transistor with said fourth transistor and another electrode from which said delay signal is delivered.

Claim 7

A clock generator connected to a power supply and adapted to receive an input signal and provide a clock output signal of a predetermined delay time with respect to the input signal applied thereto, said clock generator comprising: a delay circuit responsive to said input signal to provide a delay signal of a predetermined delay time; said delay circuit having at least one constant-resistance transistor supplied at its control electrode with a constant voltage independent of variations in the power supply voltage and exhibiting an ON resistance independent of said power supply voltage, said constant-resistance serving to make the delay time of said delay signal substantially independent of variations in said power supply voltage, and a drive circuit operatively connected to said delay circuit to provide said clock output signal; wherein said delay circuit comprises: a first transistor having an electrode connected to said power supply and a control electrode to which said input signal is applied; a second transistor connected between another electrode of said first transistor and a reference potential; a third transistor having an electrode connected to said power supply; a fourth transistor connected between another electrode of said third transistor and said reference potential; a first constant-resistance transistor connected between said another electrode of said first transistor and a control electrode of said fourth transistor; and a second constant-resistance transistor having an electrode connected to a junction of said third transistor with said fourth transistor and another electrode from which said delay signal is delivered.

Claim 8

A clock generator according to claim 4 wherein the ON resistance of said first constant-resistance transistor is sufficiently higher than the ON resistance of said first transistor such that charging is dependent on only the first constant-resistance transistor and/or the ON resistance of said second constant-resistance transistor is sufficiently higher than the ON resistance of said fourth transistor such that discharging is dependent on only said second constant-resistance transistor.

Claim 9

A clock generator connected to a power supply and adapted to receive an input signal and provide a clock output signal of a predetermined delay time with respect to the input signal applied thereto, said clock generator comprising: a delay circuit responsive to said input signal to provide a delay signal of a predetermined delay time; said delay circuit having at least one constant-resistance transistor supplied at its control electrode with a constant voltage independent of variations in the power supply voltage and exhibiting an ON resistance independent of said power supply voltage, said constant-resistance transistor serving to make the delay time of said delay signal substantially independent of variations in said power supply voltage, and a drive circuit operatively connected to said delay circuit to provide said clock output signal; wherein said delay circuit comprises: a first transistor having an electrode connected to a constant voltage independent of said power supply voltage and a control electrode to which said input signal is applied; a second transistor connected between another electrode of said first transistor and a reference potential; a third transistor having an electrode connected to said power supply; and a fourth transistor connected between another electrode of said third transistor and said reference potential, a control electrode of said fourth transistor being connected to another electrode of said first transistor as to be supplied with said constant voltage, so that said fourth transistor acts as a constant-resistance transistor.

Claim 10

A clock generator connected to a power supply and adapted to receive an input signal and provide a clock output signal of a predetermined delay time with respect to the input signal applied thereto, said clock generator comprising: a delay circuit responsive to said input signal to provide a delay signal of a predetermined delay time; said delay circuit having at least one constant-resistance transistor supplied at its control electrode with a constant voltage independent of variations in the power supply voltage and exhibiting an ON resistance independent of said power supply voltage, said constant-resistance transistor serving to make the delay time of said delay signal substantially independent of variations in said power supply voltage, and a drive circuit operatively connected to said delay circuit to provide said clock output signal; wherein said delay circuit comprises: a first transistor having an electrode connected to a constant voltage independent of said power supply voltage and a control electrode to which said input signal is applied; a second transistor connected between another electrode of said first transistor and a reference potential; a third transistor having an electrode connected to said power supply; and a fourth transistor connected between another electrode of said third transistor and said reference potential, a control electrode of said fourth transistor being connected to another electrode of said first transistor as to be supplied with said constant voltage, so that said fourth transistor acts as a constant-resistance transistor.

Claim 11

A clock generator connected to a power supply and adapted to receive an input signal and provide a clock output signal of a predetermined delay time with respect to the input signal applied thereto, said clock generator comprising: a delay circuit responsive to said input signal to provide a delay signal of a predetermined delay time; said delay circuit having at least one constant-resistance transistor supplied at its control electrode with a constant voltage independent of variations in the power supply voltage and exhibiting an ON resistance independent of said power supply voltage, said constant-resistance transistor serving to make the delay time of said delay signal substantially independent of variations in said power supply voltage; and a drive circuit operatively connected to said delay circuit to provide said clock output signal; wherein said delay circuit comprises: a first transistor having an electrode connected to said power supply and a control electrode to which said input signal is applied; a second transistor connected between another electrode of said first transistor and a reference potential; a third transistor having an electrode connected to said power supply; and a series connection of a constant-resistance transistor and a fourth transistor, said series connection being connected at a first junction between another electrode of said third transistor and said reference voltage potential and a control electrode of said fourth transistor being connected to said electrode by said first transistor, and fourth transistor being driven by a second junction between said first and second transistors; wherein said delay signal is delivered from a junction of said third transistor with said series connection.

Claim 12

A clock generator connected to a power supply and adapted to receive an input signal and provide a clock output signal of a predetermined delay time with respect to the input signal applied thereto, said clock generator comprising: a delay circuit responsive to said input signal to provide a delay signal of a predetermined delay time; said delay circuit having at least one constant-resistance transistor supplied at its control electrode with a constant voltage independent of variations in the power supply voltage and exhibiting an ON resistance independent of said power supply voltage, said constant-resistance transistor serving to make the delay time of said delay signal substantially independent of variations in said power supply voltage; and a drive circuit operatively connected to said delay circuit to provide said clock output signal; wherein said delay circuit comprises: a first transistor having an electrode connected to said power supply and a control electrode to which said input signal is applied; a second transistor connected between another electrode of said first transistor and a reference potential; a third transistor having an electrode connected to said power supply; and a series connection of a constant-resistance transistor and a fourth transistor, said series connection being connected at a first junction between another electrode of said third transistor and said reference voltage potential and a control electrode of said fourth transistor being connected to said electrode by said first transistor, and fourth transistor being driven by a second junction between said first and second transistors; wherein said delay signal is delivered from a junction of said third transistor with said series connection.

Claim 13

A clock generator according to claim 7 wherein the ON resistance of said constant-resistance transistor is sufficiently higher than the ON resistance of said fourth transistor such that discharge of said first junction is determined by only the ON resistance of said constant-resistance transistor.