US4581814A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Process for fabricating dielectrically isolated devices utilizing heating of the polycrystalline support layer to prevent substrate deformation
Assignee: Nokia Bell Labs
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Filing: 1984-12-13
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Granted: 1986-04-15
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Expires: 2004-12-13
Abstract
Abstract The efficacy of dielectrically isolated device formation on a substrate is substantially enhanced through a specific set of processing steps. In particular, before silicon oxide regions, e.g., gate oxide regions, are produced, bulk polycrystalline areas are heat treated to substantially increase their polycrystalline silicon grain size.
Inventors
- 👤 George K. Celler
- 👤 Pradip K. Roy
- 👤 Donald G. Schimmel
- 👤 Lee E. Trimble
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-01 04:38
CPC Classifications
H; H10; H10W; H10W10/00; H10W10/10; H10P; H10P95/00; H10P95/90; H10W10/01; H10W10/011; H10W10/019; Y; Y10; Y10S; Y10S148/00; Y10S148/085; Y10S148/086; Y10S148/097; Y10S148/122; Y10S148/123; Y10S438/00; Y10S438/928; Y10S438/973; Y10S438/977
Claims Analysis
Total Claims: 7
Claim 1
Independent Claim
88 words
A process for fabricating a dielectrically isolated device comprising the steps of (1) forming a polycrystalline silicon region on a silicon substrate containing a single crystal silicon region and a silicon oxide region with said silicon oxide region interposed between said polycrystalline region and said single crystal region; (2) heating said substrate for a time and at a temperature sufficient to produce a mean surface grain size of said polycrystalline silicon region of at least 10 μm; and (3) forming a device in said single crystal silicon region.
Claim 2
Dependent Claim
88 words
A process for fabricating a dielectrically isolated device comprising the steps of (1) forming a polycrystalline silicon region on a silicon substrate containing a single crystal silicon region and a silicon oxide region with said silicon oxide region interposed between said polycrystalline region and said single crystal region; (2) heating said substrate for a time and at a temperature sufficient to produce a mean surface grain size of said polycrystalline silicon region of at least 10 μm; and (3) forming a device in said single crystal silicon region.
Claim 3
Dependent Claim
12 words
The process of claim 1 wherein said heating is provided by conduction.
Claim 4
Dependent Claim
11 words
The process of claim 1 wherein said heating is provided radiantly.
Claim 5
Dependent Claim
23 words
The process of claim 3 wherein said radiant heating raises the temperature of said polycrystalline silicon region to at least 1300 degrees C.
Claim 6
Dependent Claim
19 words
The process of claim 4 wherein said polycrystalline silicon region temperature is raised to at least 1410 degrees C.
Claim 7
Dependent Claim
12 words
The process of claim 1 wherein said heating is provided by convection.
References Cited (Backward Citations)
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1989-04-14 | 1989-10-14 | 1990-04-15 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1993-04-14 | 1993-10-14 | 1994-04-15 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1997-04-14 | 1997-10-14 | 1998-04-15 | $7700.00 | Window Closed / Lapsed |