Patent US4597166A successfully refreshed from Google Patents.
US4597166A
Expired / Lapsed
US
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Semiconductor substrate and method for manufacturing semiconductor device using the same
Assignee: Toshiba Corp
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Filing: 1983-02-08
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Granted: 1986-07-01
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Expires: 2003-02-08
Abstract
Abstract A semiconductor substrate has a semiconductor substrate main body having a first major surface and a second major surface opposite thereto. At least one recess is formed in the second major surface. The recess defines a semiconductor element formation region between a bottom surface thereof and the first major surface of the substrate main body. Gettering of contaminant impurities such as heavy metals can be effectively performed at the rear surface of the substrate after the formation of a semiconductor element in the element formation region.
Inventors
- 👤 Hiroshi Iwai
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-03 20:54
CPC Classifications
H; H10; H10D; H10D62/00; H10D62/10; H10D62/117; Y; Y10; Y10S; Y10S148/00; Y10S148/06; Y10S148/066; Y10S438/00; Y10S438/928
Claims Analysis
Total Claims: 17
Claim 1
Independent Claim
85 words
A method for manufacturing a semiconductor device, comprising: (a) providing a semiconductor substrate main body having a first major surface and a second major surface opposite thereto; (b) forming a plurality of recesses in said second major surface, thereby defining a semiconductor element formation region between a bottom surface of a recess and said first major surface; (c) forming a semiconductor element in said semiconductor element formation region; and (d) subjecting said semiconductor substrate main body to a gettering treatment from said second major surface.
Claim 2
Independent Claim
85 words
A method for manufacturing a semiconductor device, comprising: (a) providing a semiconductor substrate main body having a first major surface and a second major surface opposite thereto; (b) forming a plurality of recesses in said second major surface, thereby defining a semiconductor element formation region between a bottom surface of a recess and said first major surface; (c) forming a semiconductor element in said semiconductor element formation region; and (d) subjecting said semiconductor substrate main body to a gettering treatment from said second major surface.
Claim 3
Dependent Claim
29 words
A method according to claim 1, wherein said semiconductor substrate main body comprises a wafer having a diameter of 3 inches or more and a thickness of 300 μm.
Claim 4
Dependent Claim
32 words
A method according to claim 1 or 2, wherein a distance between the bottom surface of said recess and the first major surface of said substrate is less than several hundreds micrometers.
Claim 5
Dependent Claim
29 words
A method according to claim 1 or 2, wherein said recess has a depth corresponding to not less than 10% of the thickness of said semiconductor substrate main body.
Claim 6
Dependent Claim
12 words
A method according to claim 4, wherein said recess comprises a groove.
Claim 7
Dependent Claim
33 words
A method according to claim 5, wherein a width of a ridge formed between each adjacent pair of said grooves is not more than twice a thickness of said semiconductor element formation region.
Claim 8
Dependent Claim
21 words
A method according to claim 4, wherein ridges formed between each adjacent pair of said recesses are formed in a lattice-shape.
Claim 9
Dependent Claim
26 words
A method according to claim 4, wherein a ridge formed between each adjacent pair of said recesses is formed radially from a center of said wafer.
Claim 10
Dependent Claim
20 words
A method according to claim 1 or 2, wherein said recess has a depth of not less than 150 μm.
Claim 11
Dependent Claim
12 words
A method according to claim 9, wherein said recess comprises a groove.
Claim 12
Dependent Claim
32 words
A method according to claim 10, wherein a width of a ridge formed between each adjacent pair of said grooves is not more than twice a thickness of said element formation region.
Claim 13
Dependent Claim
21 words
A method according to claim 9, wherein ridges formed between each adjacent pair of said recesses are formed in a lattice-shape.
Claim 14
Dependent Claim
26 words
A method according to claim 9, wherein a ridge formed between each adjacent pair of said recesses is formed radially from a center of said wafer.
Claim 15
Dependent Claim
14 words
A method according to claim 1, wherein step (c) is performed after step (b).
Claim 16
Dependent Claim
14 words
A method according to claim 1, wherein step (b) is performed after step (c).
Claim 17
Dependent Claim
24 words
A method according to claim 1 wherein said semiconductor substrate main body is subjected to a phosphorus gettering treatment from said second major surface.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1989-06-30 | 1989-12-30 | 1990-07-01 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1993-06-30 | 1993-12-30 | 1994-07-01 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1997-06-30 | 1997-12-30 | 1998-07-01 | $7700.00 | Window Closed / Lapsed |