Patent US4599608A successfully refreshed from Google Patents.
US4599608A
Expired / Lapsed
US
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Circuit preventing phantom input in a switch matrix
Assignee: Hitachi Ltd
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Filing: 1983-03-21
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Granted: 1986-07-08
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Expires: 2003-03-21
Abstract
Abstract In an information processing apparatus with an input device in the form of a keyboard, a multiplicity of switches associated with input keys on the keyboard are disposed in independent submatrices. When three or more keys in each submatrix are operated simultaneously, key input detection is stopped. The number of switches which are turned on in each scanning is registered and when the number is two at the most, addresses representative of the switches which are turned on are delivered out for inputting information. Key input at high speeds can be permitted and erroneous input can be prevented.
Inventors
- 👤 Shigeru Matsuoka
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-31 11:38
CPC Classifications
H; H03; H03M; H03M11/00; H03M11/20; H03M11/003
Claims Analysis
Total Claims: 16
Claim 1
Independent Claim
166 words
A keyboard circuit including a multiplicity of switches disposed in a matrix connected to associated row lines and column lines, first means for scanning one of the row lines or column lines and establishing a predetermined voltage on the one scanned line, second means for detecting said predetermined voltage from the other one of the scanned row lines or column lines, and recognition means for recognizing the address of an on-state switch from the line addresses of the scanned line in said first means and of the detected line in said second means when the predetermined voltage is detected by said second means comprising: said multiplicity of switches being disposed in at least two independent submatrices defined in said matrix, the row lines and the column lines of one of the submatrices being different from those of the other of the submatrices; and means for stopping recognition of a new on-state switch when at least three on-state switches are detected in one submatrix in one scanning.
Claim 2
Dependent Claim
166 words
A keyboard circuit including a multiplicity of switches disposed in a matrix connected to associated row lines and column lines, first means for scanning one of the row lines or column lines and establishing a predetermined voltage on the one scanned line, second means for detecting said predetermined voltage from the other one of the scanned row lines or column lines, and recognition means for recognizing the address of an on-state switch from the line addresses of the scanned line in said first means and of the detected line in said second means when the predetermined voltage is detected by said second means comprising: said multiplicity of switches being disposed in at least two independent submatrices defined in said matrix, the row lines and the column lines of one of the submatrices being different from those of the other of the submatrices; and means for stopping recognition of a new on-state switch when at least three on-state switches are detected in one submatrix in one scanning.
Claim 3
Dependent Claim
23 words
A keyboard circuit as defined in claim 1, wherein said means for stopping recognition includes means for coding the number of on-state switches.
Claim 4
Dependent Claim
39 words
A keyboard circuit as defined in claim 2, wherein said means for stopping recognition further includes a temporary memory for storing flags respectively indicating that a first, a second and a third on-state switch is detected in a scanning.
Claim 5
Dependent Claim
24 words
A keyboard circuit as defined in claim 3, wherein said temporary memory further stores an address of the first and the second on-state switches.
Claim 6
Dependent Claim
39 words
A keyboard circuit as defined in claim 4, wherein said recognition stopping means allows an output of said address at the end of each scanning when said third flag is absent and at least said first flag is present.
Claim 7
Dependent Claim
41 words
A keyboard circuit as defined in claim 1, wherein one of said submatrices is associates with keys on a keyboard which perform their function only in combination with keys on the keyboard which are associated with the other of said submatrices.
Claim 8
Dependent Claim
30 words
A keyboard circuit as defined in claim 1, wherein one of said submatrices is associated with keys on a keyboard to be operated by left hand fingers of an operator.
Claim 9
Dependent Claim
28 words
A keyboard circuit as defined in claim 7, wherein the other of said submatrices is associated with keys to be operated by right hand fingers of an operator.
Claim 10
Dependent Claim
48 words
A keyboard circuit as defined in claim 1, wherein said recognition stopping means is set for stopping recognition by detection of at least three on-state switches in one submatrix in one scanning and is reset by detection of no on-state switch in the submatrix in a succeeding scanning.
Claim 11
Dependent Claim
50 words
A keyboard circuit as defined in claim 1, wherein said recognition stopping means is set for stopping recognition by detection of at least three on-state switches in one submatrix in one scanning and is reset by detection of at most two on-state switches in the submatrix in a succeeding scanning.
Claim 12
Dependent Claim
48 words
A keyboard circuit according to claim 1, wherein said means for stopping recognition includes means for causing a next scanning without performing voltage establishment and voltage detection of lines in the other submatrix when at least three on-state switches are detected in one scanning in the one submatrix.
Claim 13
Dependent Claim
24 words
A keyboard circuit according to claim 1, wherein said one submatrix includes character keyswitches and said the other submatrix includes a shift key switch,
Claim 14
Dependent Claim
37 words
A keyboard circuit according to claim 12, wherein said means for stopping recognition does not perform recognition of said the other submatrix when at least three on-state switches are detected in said one submatrix in one scanning.
Claim 15
Dependent Claim
101 words
An input system having a multiplicity of input switches arranged in a matrix of rows and columns, comprising: means for addressing said matrix by scanning to detect an on/off state of the respective switches; said matrix including at least two independent submatrices Xij, Xkl and, where i≠k and j≠l; said switches being disposed at cross points of rows and columns in said sub-matrices; means for registering the number of on-state switches in at least one of the submatrices detected in each scanning; and means for supplying the address of an on-state switch only when said registered number is one or two.
Claim 16
Dependent Claim
101 words
An input system having a multiplicity of input switches arranged in a matrix of rows and columns, comprising: means for addressing said matrix by scanning to detect an on/off state of the respective switches; said matrix including at least two independent submatrices Xij, Xkl and, where i≠k and j≠l; said switches being disposed at cross points of rows and columns in said sub-matrices; means for registering the number of on-state switches in at least one of the submatrices detected in each scanning; and means for supplying the address of an on-state switch only when said registered number is one or two.
References Cited (Backward Citations)
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1989-07-07 | 1990-01-06 | 1990-07-08 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1993-07-07 | 1994-01-06 | 1994-07-08 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1997-07-07 | 1998-01-06 | 1998-07-08 | $7700.00 | Window Closed / Lapsed |