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US4605909A Expired / Lapsed US ⏱️ 0.0 years remaining

Dual gate FET oscillator mixer

Assignee: US Philips Corp
•
Filing: 1982-01-28
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Granted: 1986-08-12
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Expires: 2002-01-28
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Abstract

Abstract An oscillator-mixer arrangement including a dual-gate field effect transistor of the Schottky type for supplying an intermediate frequency output signal. The output signal is obtained by subtractively mixing a high frequency input signal and a signal produced in the arrangement. The input signal is applied to the first gate electrode (G 1 ), the produced signal is controlled by the second gate electrode (G 2 ), and the output signal is recovered at the drain electrode (D), while the source electrode (S) is directly connected to ground. A micro-strip line having a characteristic impedance Z O which is electromagnetically coupled to a dielectric resonator and loaded by an impedance (Z O ) is connected to the second gate electrode (G 2 ). The arrangement is intended to be included in a receiver front end assembly for very high frequency waves, typically of a frequency of 12 GHz, used for broadcasting radio-television programs by artificial satellites.

Inventors

  • 👤 Christos Tsironis

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-11-02 21:40
CPC Classifications
H; H03; H03D; H03D9/00; H03D9/06; H03D9/0658; H03D9/0675; H03B; H03B5/00; H03B5/18; H03B5/1864; H03B5/187; H03B5/1876; H03D7/00; H03D7/12; H03D7/125; H03B2200/00; H03B2200/003; H03B2200/0032; H03B2200/006; H03B2200/0062; H03B5/1841; H03B5/1847; H03B5/1852; H03D2200/00; H03D2200/0001; H03D2200/0007

Claims Analysis

Total Claims: 7
Claim 1
Independent Claim 172 words
A self-oscillating circuit arrangement comprising: (a) a dual-gate field effect transistor including first and second gate electrodes, a drain electrode and a source electrode; (b) a first input circuit comprising an input terminal, an input impedance electrically connected between said input terminal and the first gate electrode, and means for applying a bias voltage to said first gate electrode; (c) a second input circuit comprising a strip-type transmission line having one end electrically connected to the second gate electrode, said transmission line being terminated in a load having an impedance equal to the characteristic impedance of the line and being electromagnetically coupled to a dielectric resonator having a predetermined resonant frequency; (d) an output terminal coupled to the drain electrode; and (e) means electrically connected to the source electrode for referencing said electrode to a predetermined voltage; said circuit arrangement producing at the output terminal an output signal having a difference frequency equal to the difference between the frequency of an input signal applied to the input terminal and the resonant frequency.
Claim 2
Dependent Claim 172 words
A self-oscillating circuit arrangement comprising: (a) a dual-gate field effect transistor including first and second gate electrodes, a drain electrode and a source electrode; (b) a first input circuit comprising an input terminal, an input impedance electrically connected between said input terminal and the first gate electrode, and means for applying a bias voltage to said first gate electrode; (c) a second input circuit comprising a strip-type transmission line having one end electrically connected to the second gate electrode, said transmission line being terminated in a load having an impedance equal to the characteristic impedance of the line and being electromagnetically coupled to a dielectric resonator having a predetermined resonant frequency; (d) an output terminal coupled to the drain electrode; and (e) means electrically connected to the source electrode for referencing said electrode to a predetermined voltage; said circuit arrangement producing at the output terminal an output signal having a difference frequency equal to the difference between the frequency of an input signal applied to the input terminal and the resonant frequency.
Claim 3
Dependent Claim 18 words
A self-oscillating circuit arrangement as in claim 1 where the characteristic impedance is approximately equal to 50 ohms.
Claim 4
Dependent Claim 34 words
A circuit arrangement as in claim 1 or 2 including a strip-type quarter-wave open transmission line electrically connected to the drain electrode for eliminating frequencies other than the difference frequency from the output signal.
Claim 5
Dependent Claim 28 words
A circuit arrangement as in claim 1 or 2 where the input impedance has a magnitude which is selected to maximize the power conversion gain of said arrangement.
Claim 6
Dependent Claim 30 words
A circuit arrangement as in claim 1 or 2 where said input terminal is referenced to a DC voltage, said output signal having a frequency equal to the resonant frequency.
Claim 7
Dependent Claim 41 words
A circuit arrangement as in claim 5 including an output impedance electrically connected between the drain electrode and the output terminal, the magnitudes of the input impedance and said output impedance being selected to maximize the magnitude of the output signal.

References Cited (Backward Citations)

US4112373A Cited
JPS5311506A Cited
JPS5530206A Cited
JPS55121706A Cited
US4563772A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1989-08-11 1990-02-10 1990-08-12 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1993-08-11 1994-02-10 1994-08-12 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 1997-08-11 1998-02-10 1998-08-12 $7700.00 Window Closed / Lapsed

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