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US4610756A Expired / Lapsed US ⏱️ 0.0 years remaining

Printed circuit board and process for its manufacture

Assignee: Cirtech SA
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Filing: 1983-07-13
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Granted: 1986-09-09
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Expires: 2003-07-13
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Abstract

Abstract The printed circuit board is produced without soldering lands around the contacting, supporting or interconnecting holes of a simple faced, double-faced or multilayer circuit. The inner wall of the hole is covered with a copper layer which extends only until the free surface of the naked board, i.e. levels that surface, or does not fully extend until this level. The said layer is covered with a tin-lead metallisation layer which serves as a soldering link element. The solder mounts towards the wire or pin of the soldered component but does not touch nor spoil the free, insulating surface of the support. One necessary condition of the making process of the board is the precise, clean, proper and sharp drilling of the holes.

Inventors

  • 👤 Jean-Paul Strobel

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-11-02 19:39
CPC Classifications
H; H05; H05K; H05K3/00; H05K3/40; H05K3/42; H05K3/425; H05K3/427; H05K1/00; H05K1/02; H05K1/11; H05K1/115; H05K1/116; H05K2201/00; H05K2201/09; H05K2201/09209; H05K2201/095; H05K2201/09545; H05K2203/00; H05K2203/04; H05K2203/044; H05K2203/07; H05K2203/0703; H05K2203/0723; H05K3/02; H05K3/06; H05K3/061; H05K3/062; H05K3/10; H05K3/108; H05K3/30; H05K3/32; H05K3/34; H05K3/3465; H05K3/3468; Y; Y10; Y10T; Y10T29/00; Y10T29/49; Y10T29/49002; Y10T29/49117; Y10T29/49124; Y10T29/49155; Y10T29/49165

Claims Analysis

Total Claims: 13
Claim 1
Independent Claim 115 words
A method for making a printed circuit board by masking and etching, comprising the following steps: (1) providing a flat, clean circuit board consisting of insulating material and copper clad on at least one of its major surfaces, (2) drilling, according to a desired and predeterminated pattern, perfect and precise through holes in said board, (3) metallization of at least the inner wall of the drilled holes, to deposit a thin metal lining, (4) masking of the circuit board surface or surfaces by a mask showing a predeterminated circuit pattern, the mask overlapping the edges of the drilled holes, (5) applying an etching resist on the so masked circuit board, and (6) etching the circuit.
Claim 2
Independent Claim 115 words
A method for making a printed circuit board by masking and etching, comprising the following steps: (1) providing a flat, clean circuit board consisting of insulating material and copper clad on at least one of its major surfaces, (2) drilling, according to a desired and predeterminated pattern, perfect and precise through holes in said board, (3) metallization of at least the inner wall of the drilled holes, to deposit a thin metal lining, (4) masking of the circuit board surface or surfaces by a mask showing a predeterminated circuit pattern, the mask overlapping the edges of the drilled holes, (5) applying an etching resist on the so masked circuit board, and (6) etching the circuit.
Claim 3
Dependent Claim 26 words
The method of claim 1 wherein the etched circuit board is heat tinned from a metal melt at least on the inner walls of the holes.
Claim 4
Dependent Claim 27 words
The method of claim 1 wherein step (5) is the electroplating with a tin-lead alloy by simultaneously depositioning these metals from an aqueous solution of their salts.
Claim 5
Dependent Claim 282 words
In a method for making a printed circuit board having conductor paths on at least one major surface of a supporting substrate of electrically insulating material, and through holes traversing said substrate and having electrically conductive inner walls which are in electric contact with at least one or none of said conductor paths, comprising masking and etching steps, the improvement that the circuit board is free from soldering lands, the inner walls of the holes being augmented by an electrically plated copper layer which optionally also covers at least part of the conductor paths, the copper layer covering the hole walls ending at a location being at level or below the level of the surface plane of said substrate over the entire circumference of said inner wall of the hole except the width of the conductor path with which said copper layer is in contact if there is any conductor path to be in contact with the hole wall, said improvement being implemented by the following steps: (1) providing a flat, clean circuit board consisting of insulating material and copper clad on at least one of its major surfaces, (2) drilling, according to a desired and predetermined pattern, perfect and precise through holes in said board, (3) metallizing at least the inner wall of the drilled holes, to deposit a thin metal lining, (4) masking one surface or both surfaces of the circuit board by a mask showing a predetermined circuit pattern, the mask overlapping the edges of the drilled holes, (5) applying an etching resist on the so masked circuit board, (6) etching the circuit, and (7) heat tinning at least the inner walls of the holes from a molten metal.
Claim 6
Dependent Claim 282 words
In a method for making a printed circuit board having conductor paths on at least one major surface of a supporting substrate of electrically insulating material, and through holes traversing said substrate and having electrically conductive inner walls which are in electric contact with at least one or none of said conductor paths, comprising masking and etching steps, the improvement that the circuit board is free from soldering lands, the inner walls of the holes being augmented by an electrically plated copper layer which optionally also covers at least part of the conductor paths, the copper layer covering the hole walls ending at a location being at level or below the level of the surface plane of said substrate over the entire circumference of said inner wall of the hole except the width of the conductor path with which said copper layer is in contact if there is any conductor path to be in contact with the hole wall, said improvement being implemented by the following steps: (1) providing a flat, clean circuit board consisting of insulating material and copper clad on at least one of its major surfaces, (2) drilling, according to a desired and predetermined pattern, perfect and precise through holes in said board, (3) metallizing at least the inner wall of the drilled holes, to deposit a thin metal lining, (4) masking one surface or both surfaces of the circuit board by a mask showing a predetermined circuit pattern, the mask overlapping the edges of the drilled holes, (5) applying an etching resist on the so masked circuit board, (6) etching the circuit, and (7) heat tinning at least the inner walls of the holes from a molten metal.
Claim 7
Dependent Claim 29 words
The method of claim 4 wherein step (5) is carried out by electroplating with a tin-lead alloy to simultaneously deposit these metals from an aqueous solution of their salts.
Claim 8
Dependent Claim 18 words
The method of claim 4 wherein said conductor paths are less wide than the diameter of said holes.
Claim 9
Dependent Claim 41 words
The method of claim 4 wherein at least the copper layer on the inner walls of the holes and the adjacent portions of the conductor paths in contact with said layer on the hole walls, are covered by a tin-lead alloy.
Claim 10
Dependent Claim 15 words
The method of claim 4 wherein said substrate carries conductor paths on both major surfaces.
Claim 11
Dependent Claim 18 words
The method of claim 4 wherein said substrate carries conductor paths on one of its two major surfaces.
Claim 12
Dependent Claim 41 words
The method of claim 4, wherein the diameter of component mounting holes is drilled to about 0.8 mm and that of the holes interconnecting the conductor paths on opposite major surfaces of the substrate, to about 0.3 mm to 0.4 mm.
Claim 13
Dependent Claim 46 words
The method of claim 4 wherein the copper layer covering the inner wall of the hole is etched to end at a distance below the level of said substrate which corresponds to the thickness of the original conductor paths before augmentation by the plated copper layer.

References Cited (Backward Citations)

DE1811377A1 Cited
US3702284A Cited
US3772101A Cited
US4179800A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1989-09-08 1990-03-10 1990-09-09 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1993-09-08 1994-03-10 1994-09-09 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 1997-09-08 1998-03-10 1998-09-09 $7700.00 Window Closed / Lapsed

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