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US4630237A Expired / Lapsed US ⏱️ 0.0 years remaining

Read-only memory and method of manufacturing the same

Assignee: NTT Inc
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Filing: 1985-07-24
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Granted: 1986-12-16
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Expires: 2005-07-24
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Abstract

Abstract A read-only memory has memory cells each with a vertical metal oxide semiconductor field effect transistor and a bit line. The vertical metal oxide semiconductor field effect transistor has a gate electrode serving as a word line, a source, a drain, and a vertical channel region between the source and drain constituted by first and second diffusion layers. The gate electrode is formed on a side wall of a trench, which has a pair of side walls substantially perpendicular to a major surface of a semiconductor substrate of a first conductivity type and an interconnecting bottom surface substantially perpendicular to the side wall surfaces. The first and second diffusion layers of a second conductivity type are formed in an upper portion of the semiconductor substrate and in a bottom of the trench, respectively. The bit lines are formed in a predetermined pattern. One of the first and second diffusion layers is connected to the bit line through a contact hole and the other of the first and second diffusion layers is used as a common current line. A method of manufacturing the read-only memory is also proposed.

Inventors

  • 👤 Kenji Miura
  • 👤 Shigeru Nakajima
  • 👤 Kazushige Minegishi
  • 👤 Toshifumi Somatani
  • 👤 Takashi Morie
  • 👤 Tatsuo Baba

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-10-29 22:34
CPC Classifications
H; H10; H10B; H10B20/00; H10B20/27; H10B20/30; H10B20/38; H10D; H10D30/00; H10D30/60; H10D30/63; Y; Y10; Y10S; Y10S257/00; Y10S257/903

Claims Analysis

Total Claims: 10
Claim 1
Independent Claim 184 words
A read-only memory comprising memory cells each having a vertical metal oxide semiconductor field effect transistor and a bit line, said vertical metal oxide semiconductor field effect transistor having a gate electrode serving as a word line, a source and a drain, said source and said drain being constituted by first and second diffusion layers, and a vertical channel region between said source and said drain, said gate electrode being formed on a side wall of a trench, said trench havig side wall surfaces substantially perpendicular to a major surface of a semiconductor substrate of a first conductivity type and a interconnecting bottom surface substantially perpendicular to said side wall surfaces, said first and second diffusion layers being of a second conductivity type formed in an upper portion of said semiconductor substrate and in a bottom of said trench, respectively, said bit lines being formed in a predetermined pattern, one of said first and second diffusion layers being connected to said bit line through a contact hole and the other of said first and second diffusion layers being used as a common current line.
Claim 2
Dependent Claim 184 words
A read-only memory comprising memory cells each having a vertical metal oxide semiconductor field effect transistor and a bit line, said vertical metal oxide semiconductor field effect transistor having a gate electrode serving as a word line, a source and a drain, said source and said drain being constituted by first and second diffusion layers, and a vertical channel region between said source and said drain, said gate electrode being formed on a side wall of a trench, said trench havig side wall surfaces substantially perpendicular to a major surface of a semiconductor substrate of a first conductivity type and a interconnecting bottom surface substantially perpendicular to said side wall surfaces, said first and second diffusion layers being of a second conductivity type formed in an upper portion of said semiconductor substrate and in a bottom of said trench, respectively, said bit lines being formed in a predetermined pattern, one of said first and second diffusion layers being connected to said bit line through a contact hole and the other of said first and second diffusion layers being used as a common current line.
Claim 3
Dependent Claim 23 words
A memory according to claim 1, wherein said contact hole is formed in accordance with date to be written into a given cell.
Claim 4
Dependent Claim 16 words
A memory according to claim 1, wherein said vertical channel region comprises a channel doped region.
Claim 5
Dependent Claim 37 words
A memory according to claim 1, wherein said trench comprises a grid-like trench, a memory cell is in a region surrounded by said grid-like trench, and said second diffusion layer being used as said common current line.
Claim 6
Dependent Claim 61 words
A memory according to claim 4, wherein said trench has a pattern narrowed in a direction parallel to the bit line and widened in a direction parallel to the word line, a narrowed pattern portion of said trench is filled by said gate electrode, and a widened pattern portion of said trench is filled by said gate electrode and other material.
Claim 7
Dependent Claim 24 words
A memory according to claim 1, wherein said trench comprises an island-like trench, and a memory cell region is located in said island-like trench.
Claim 8
Dependent Claim 46 words
A memory according to claim 6, wherein a distance between adjacent trenches has a pattern narrowed along a direction parallel to the bit line and widened along a direction parallel to the word line, and said first diffusion layer being used as said common current line.
Claim 9
Dependent Claim 29 words
A memory according to claim 1, wherein said vertical channel region comprises a channel doped region whoe impurity concentration corresponds to data to be written into a given cell.
Claim 10
Dependent Claim 26 words
A memory according to claim 8, wherein said channel doped region has an impurity concentration corresponding to the data to be written into a given cell.

References Cited (Backward Citations)

US4222062A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1989-12-15 1990-06-16 1990-12-16 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1993-12-15 1994-06-16 1994-12-16 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 1997-12-15 1998-06-16 1998-12-16 $7700.00 Window Closed / Lapsed

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