Method for micro-pack production

Claim 1

A method of producing micropacks, comprising the sequential steps of: (a) applying a chip, having predetermined spaced solder locations, to an adhesive-coated first carrier; (b) moving the first carrier and the chip over a hollow first member which includes at least first and second bores; (c) applying a negative pressure to the hollow first member to suck the first carrier thereagainst via the bores; (d) moving a second carrier, having electrical connections spaced corresponding to the predetermined spacing of the solder locations, into alignment with the chip; (e) moving a soldering second member into engagement with the second carrier and applying heat pulses therewith to solder the electrical connections to the respective solder locations; (f) moving a pin through one of the boes in the hollow first member, by moving such member away from the first carrier and maintaining the pin fixed, to pierce the first carrier, to engage and release the chip from the adhesive and to align the solder locations with the electrical conductors; and (g) moving the second carrier and the attached chip away from the hollow first member.

Claim 2

A method of producing micropacks, comprising the sequential steps of: (a) applying a chip, having predetermined spaced solder locations, to an adhesive-coated first carrier; (b) moving the first carrier and the chip over a hollow first member which includes at least first and second bores; (c) applying a negative pressure to the hollow first member to suck the first carrier thereagainst via the bores; (d) moving a second carrier, having electrical connections spaced corresponding to the predetermined spacing of the solder locations, into alignment with the chip; (e) moving a soldering second member into engagement with the second carrier and applying heat pulses therewith to solder the electrical connections to the respective solder locations; (f) moving a pin through one of the boes in the hollow first member, by moving such member away from the first carrier and maintaining the pin fixed, to pierce the first carrier, to engage and release the chip from the adhesive and to align the solder locations with the electrical conductors; and (g) moving the second carrier and the attached chip away from the hollow first member.

Claim 3

A method of producing micropacks, comprising the sequential steps of: (a) supporting a plurality of chips, each having solder locations, on an adhesive layer carried by a first carrier; (b) moving the first carrier in a step-by-step manner to position each supported chip over a perforate anvil for a predetermined dwell time; (c) supporting a plurality of electrical conductors, arranged corresponding to the solder locations, on a second carrier; (d) moving the second carrier over and in synchronism with the first carrier to align electrical conductor and solder locations; (e) applying a vacuum through the perforate anvil during the dwell times to releasably secure the first carrier to the anvil; (f) during each dwell time, moving a soldering head toward the anvil to clamp the first and second carriers and their supported elements therebetween; (g) during each dwell time applying heat pulses to solder the electrical conductors to the solder locations; (h) during each dwell time moving the soldering head away from the anvil; and (i) during each dwell time, stripping the soldered chip from the adhesive and thereby supporting the same with the second carrier, including (i1) moving a pin through the anvil to align the solder locations with the electrical conductors to pierce the first carrier and engage and release the chip from the adhesive.

Claim 4

A method of producing micropacks, comprising the sequential steps of: (a) supporting a plurality of chips, each having solder locations, on an adhesive layer carried by a first carrier; (b) moving the first carrier in a step-by-step manner to position each supported chip over a perforate anvil for a predetermined dwell time; (c) supporting a plurality of electrical conductors, arranged corresponding to the solder locations, on a second carrier; (d) moving the second carrier over and in synchronism with the first carrier to align electrical conductor and solder locations; (e) applying a vacuum through the perforate anvil during the dwell times to releasably secure the first carrier to the anvil; (f) during each dwell time, moving a soldering head toward the anvil to clamp the first and second carriers and their supported elements therebetween; (g) during each dwell time applying heat pulses to solder the electrical conductors to the solder locations; (h) during each dwell time moving the soldering head away from the anvil; and (i) during each dwell time, stripping the soldered chip from the adhesive and thereby supporting the same with the second carrier, including (i1) moving a pin through the anvil to align the solder locations with the electrical conductors to pierce the first carrier and engage and release the chip from the adhesive.