Patent US1870997A successfully refreshed from Google Patents.
Patent US4782373A successfully refreshed from Google Patents.
US4782373A
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Self-aligned semiconductor device with non-diffusable contacts
Assignee: NXP USA Inc
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Filing: 1987-09-25
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Granted: 1988-11-01
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Expires: 2007-09-25
Abstract
Abstract An active portion of a cell of a static RAM semiconductor device comprising a MOSFET and a variable resistor load device having non-diffused contacts which are self-aligned is described. A polycrystalline gate is used as a mask for the implantation of a source and a drain into a semiconductor substrate. Following the formation of a conformal dielectric layer and a conformal polycrystalline layer PtSi contacts are formed. These contacts are also aligned by the gate and do not diffuse and therefore may be spaced closely together. As the MOSFET of the device is turned "on" and "off" the resistance of the load device increases and decreases proportionately.
Inventors
- 👤 Clarence A. Lund
- 👤 Jenny M. Ford
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-29 10:22
CPC Classifications
H; H10; H10D; H10D1/00; H10D1/40; H10D1/47; H10B; H10B10/00; H10D64/00; H10D64/01; H10D64/011; H10B10/15
Claims Analysis
Total Claims: 9
Claim 1
Independent Claim
88 words
An active semiconductor device comprising a MOSFET and a variable resistor load device comprising: a semiconductor substrate; a source and a drain disposed in said substrate; a gate dielectric layer disposed on said substrate; a polycrystalline gate disposed on said gate dielectric layer; a conformal dielectric layer disposed on said gate; a conformal polycrystalline layer disposed on said conformal dielectric layer; and at least two spaced-apart non-diffused contacts disposed on portions of said conformal polycrystalline layer, said contacts being aligned on said conformal polycrystalline layer by said gate.
Claim 2
Dependent Claim
88 words
An active semiconductor device comprising a MOSFET and a variable resistor load device comprising: a semiconductor substrate; a source and a drain disposed in said substrate; a gate dielectric layer disposed on said substrate; a polycrystalline gate disposed on said gate dielectric layer; a conformal dielectric layer disposed on said gate; a conformal polycrystalline layer disposed on said conformal dielectric layer; and at least two spaced-apart non-diffused contacts disposed on portions of said conformal polycrystalline layer, said contacts being aligned on said conformal polycrystalline layer by said gate.
Claim 3
Dependent Claim
12 words
The device of claim 1 wherein the non-diffusable contacts comprise a metal.
Claim 4
Dependent Claim
12 words
The device of claim 2 wherein the non-diffusable contacts comprise a silicide.
Claim 5
Dependent Claim
11 words
The device of claim 3 wherein the non-diffusable contacts comprise PtSi.
Claim 6
Dependent Claim
20 words
The device of claim 1 wherein the polycrystalline gate has a length in the range of 0.1 to 1.0 micrometers.
Claim 7
Dependent Claim
16 words
The device of claim 5 wherein the polycrystalline gate has a length of approximately 0.5 micrometers.
Claim 8
Dependent Claim
25 words
The device of claim 1 wherein the conformal polycrystalline layer has a length in the range of 0.4 to 1.6 micrometers between the non-diffused contacts.
Claim 9
Dependent Claim
21 words
The device of claim 7 wherein the conformal polycrystalline layer has a length of approximately 0.8 micrometers between the non-diffused contacts.
References Cited (Backward Citations)
US4240097A
Cited
US4453175A
Cited
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1991-11-01 | 1992-05-02 | 1992-11-01 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1995-11-01 | 1996-05-02 | 1996-11-01 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1999-11-01 | 2000-05-02 | 2000-11-01 | $7700.00 | Window Closed / Lapsed |