US4801936A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Broadband signal switching apparatus
Assignee: Siemens AG
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Filing: 1987-09-17
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Granted: 1989-01-31
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Expires: 2007-09-17
Abstract
Abstract A broadband signal cross point switching equipment comprises a cross point matrix having FET switch elements formed with a switching transistor and a holding circuit for providing a through-connect or inhibit signal. The matrix has input lines and output lines and the switching transistor includes a main electrode connected to the respective output line. The switch elements each comprise an auxiliary transistor forming a series circuit with the switching transistor and including a control electrode which is connected to the appertaining matrix input line and a main electrode, facing away from the series circuit, connected by way of a sampling transistor to one terminal of the operating voltage source, to whose other terminal the respective matrix output line is connected by way of a precharging transistor. The precharging transistor and the sampling transistor have their control electrodes charges opposite relative to one another with a switching matrix selection clock and subdivide a bit through connection time interval into a charging phase and an actual through-connect phase so that, given an inhibited sampling transistor, the matrix output line in each preliminary phase is at least approximately charged by way of the precharging transistor to the potential prevailing at the other terminal of the voltage source.
Inventors
- 👤 Ruediger Hofmann
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-29 18:07
CPC Classifications
H; H04; H04Q; H04Q3/00; H04Q3/42; H04Q3/52; H04Q3/521; H03; H03K; H03K17/00; H03K17/51; H03K17/56; H03K17/687; H03K17/693
Claims Analysis
Total Claims: 7
Claim 1
Independent Claim
316 words
In a broadband signal switching equipment of the type which is constructed in field effect transistor technology and of the type which includes a cross point matrix which comprises a first matrix of input lines and output lines which intersect to define cross points, and a second matrix of first selection lines and second selection lines which intersect at the cross points, and in which each cross point comprises a switching element including a switching transistor including a first main electrode connected to the respective output line, a second main electrode connectible to a first potential, and a control electrode for receiving a through-connect signal or an inhibit signal, and a holding circuit including selection inputs connected to respective first and second selection lines at the respective cross point and an output connected to said control electrode of said switching transistor, the improvement therein comprising: an auxiliary transistor including a first main electrode connected to said second main electrode of said switching transistor, a second main electrode connectible to the first potential, and a control electrode connected to the respective input line; p1 a plurality of precharging transistors each including a pair of main electrodes connected in series between a respective output line and a second potential, and a control electrode for receiving a clock signal; and a sampling transistor operable to divide a bit through-connection interval into a precharging phase and a through-connect phase, said sampling transistor including a control electrode for receiving a clock signal, and a pair of main electrodes connected between said second main electrode of said auxiliary transistor and the first potential, said sampling transistor and said precharging transistor oppositely operable in response to the clock signals so that the respective matrix output line is charged via the precharging transistor to at least approximately the potential prevailing at the second potential in each precharging phase given an inhibited respective sampling transistor.
Claim 2
Dependent Claim
316 words
In a broadband signal switching equipment of the type which is constructed in field effect transistor technology and of the type which includes a cross point matrix which comprises a first matrix of input lines and output lines which intersect to define cross points, and a second matrix of first selection lines and second selection lines which intersect at the cross points, and in which each cross point comprises a switching element including a switching transistor including a first main electrode connected to the respective output line, a second main electrode connectible to a first potential, and a control electrode for receiving a through-connect signal or an inhibit signal, and a holding circuit including selection inputs connected to respective first and second selection lines at the respective cross point and an output connected to said control electrode of said switching transistor, the improvement therein comprising: an auxiliary transistor including a first main electrode connected to said second main electrode of said switching transistor, a second main electrode connectible to the first potential, and a control electrode connected to the respective input line; p1 a plurality of precharging transistors each including a pair of main electrodes connected in series between a respective output line and a second potential, and a control electrode for receiving a clock signal; and a sampling transistor operable to divide a bit through-connection interval into a precharging phase and a through-connect phase, said sampling transistor including a control electrode for receiving a clock signal, and a pair of main electrodes connected between said second main electrode of said auxiliary transistor and the first potential, said sampling transistor and said precharging transistor oppositely operable in response to the clock signals so that the respective matrix output line is charged via the precharging transistor to at least approximately the potential prevailing at the second potential in each precharging phase given an inhibited respective sampling transistor.
Claim 3
Dependent Claim
29 words
The broadband signal switching equipment of claim 1, wherein: said switching transistors, said auxiliary transistors and said sampling transistors are n-channel transistors and said precharging transistors are p-channel transistors.
Claim 4
Dependent Claim
25 words
The broadband signal switching equipment of claim 1, wherein: said switching transistors, said auxiliary transistors, said sampling transistors and said precharging transistors are n-channel transistors.
Claim 5
Dependent Claim
19 words
The broadband signal switching equipment of claim 1, wherein: a respective sampling transistor is located at each cross point.
Claim 6
Dependent Claim
25 words
The broadband signal switching equipment of claim 1, wherein: a respective sampling transistors is connected to each auxiliary transistor of a respective matrix input line.
Claim 7
Dependent Claim
25 words
The broadband signal switching equipment of claim 1, wherein: a respective sampling transistor is connected to each auxiliary transistor of a respective matrix output line.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1992-01-31 | 1992-08-01 | 1993-01-31 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1996-01-31 | 1996-08-01 | 1997-01-31 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2000-01-31 | 2000-08-01 | 2001-01-31 | $7700.00 | Window Closed / Lapsed |