Patent US4807147A successfully refreshed from Google Patents.
US4807147A
Expired / Lapsed
US
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Sampling wave-form digitizer for dynamic testing of high speed data conversion components
Assignee: Texas Instruments Tucson Corp
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Filing: 1985-11-27
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Granted: 1989-02-21
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Expires: 2005-11-27
Abstract
Abstract A sampling digitizer system which may be expanded for the dynamic testing of high speed data conversion components is provided. The sampling waveform digitizer system comprises a sampling comparator for comparing a sampled input signal with a first signal. An integrator coupled to the comparator provides an output signal from the integrator and becomes the first signal. An analog to digital converter provides the digital representation of the analog waveform. A controllable delay is provided for selecting a period of time for sampling the input signal by the comparator. A control device is provided for controlling the time the comparator samples the input signal. These combination of system features allow the digitizer to receive high speed analog waveforms and convert them to an accurate digital representation of the previously described high speed analog waveform.
Inventors
- 👤 Joel M. Halbert
- 👤 Myron J. Koen
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-29 08:54
CPC Classifications
G; G01; G01R; G01R31/00; G01R31/28; G01R31/2832; G01R31/2834; H; H03; H03M; H03M1/00; H03M1/12; H03M1/124; H03M1/1245; H03M1/1255
Claims Analysis
Total Claims: 27
Claim 1
Independent Claim
204 words
A sampling waveform digitizer for testing waveforms generated by electronic devices, the digitizer comprising: a latching comparator having an inverting input (-), a noninverting input (+), a strobe input (LE), and an output; an integrator having an input coupled to the output of the latching comparator and having an output coupled to the noninverting input of the latching comparator; a test signal generator having an output for coupling a test stimulus to a Device Under Test (DUT); a programmable delay element having an input coupled to an output of the test signal generator and an output coupled to the LE input of the latching comparator, said programmable delay element for supplying strobe pulses to the LE input of the latching comparator for establishing times at which a waveform under test, developed by the DUT in response to the test stimulus, is sampled so that an integrated version of the comparator output assumes a predetermined relationship with respect to the waveform under test at the times that the waveform under test is sampled; and control means coupled to the programmable delay element for controlling the time at which strobe pulses are supplied by the programmable delay element to the LE input of the latching comparator.
Claim 2
Dependent Claim
204 words
A sampling waveform digitizer for testing waveforms generated by electronic devices, the digitizer comprising: a latching comparator having an inverting input (-), a noninverting input (+), a strobe input (LE), and an output; an integrator having an input coupled to the output of the latching comparator and having an output coupled to the noninverting input of the latching comparator; a test signal generator having an output for coupling a test stimulus to a Device Under Test (DUT); a programmable delay element having an input coupled to an output of the test signal generator and an output coupled to the LE input of the latching comparator, said programmable delay element for supplying strobe pulses to the LE input of the latching comparator for establishing times at which a waveform under test, developed by the DUT in response to the test stimulus, is sampled so that an integrated version of the comparator output assumes a predetermined relationship with respect to the waveform under test at the times that the waveform under test is sampled; and control means coupled to the programmable delay element for controlling the time at which strobe pulses are supplied by the programmable delay element to the LE input of the latching comparator.
Claim 3
Dependent Claim
22 words
A sampling waveform digitizer as defined in claim 1 wherein the latching comparator comprises a latching input stage and an output stage.
Claim 4
Dependent Claim
32 words
A sampling waveform digitizer as defined in claim 1 wherein the control means includes a computer for determining, under program control, the time at which the waveform under test is repeatedly sampled.
Claim 5
Dependent Claim
51 words
A sampling waveform digitizer as defined in claim 3 wherein the programmable delay element is a digitally programmable delay element and the computer controls the time at which the waveform under test is repeatedly sampled until the output of the integrator is substantially equal to the waveform under test as sampled.
Claim 6
Dependent Claim
24 words
A sampling waveform digitizer as defined in claim 4 further comprising an A/D converter coupled between the output of the integrator and the computer.
Claim 7
Dependent Claim
26 words
A sampling waveform digitizer as defined in claim 1 further comprising conversion means (35) coupled between the noninverting input of the comparator and the control means.
Claim 8
Dependent Claim
173 words
A sampling waveform digitizer for testing a waveform under test that is developed by a Device Under Test (DUT) in response to a test stimulus, the sampling waveform digitizer comprising: (a) a comparator/integrator loop having an inverting input (43), a noninverting input (44), a strobe input (42), and an output (33), said inverting input for accepting the waveform under test; (b) a test signal generator having an output for coupling the test stimulus to the DUT; and (c) programmable delay means having an input coupled to an output of the test signal generator and having an output coupled to the strobe input of the comparator/integrator loop for supplying to the strobe input a sequence of strobe pulses having a controlled phase relative to the waveform under test, so that, in response to the sequence of strobe pulses, the comparator/integrator loop samples the waveform under test until the signal at output (33) assumes a predetermined relationship with respect to the waveform under test at a time/point at which the waveform under test is sampled.
Claim 9
Dependent Claim
173 words
A sampling waveform digitizer for testing a waveform under test that is developed by a Device Under Test (DUT) in response to a test stimulus, the sampling waveform digitizer comprising: (a) a comparator/integrator loop having an inverting input (43), a noninverting input (44), a strobe input (42), and an output (33), said inverting input for accepting the waveform under test; (b) a test signal generator having an output for coupling the test stimulus to the DUT; and (c) programmable delay means having an input coupled to an output of the test signal generator and having an output coupled to the strobe input of the comparator/integrator loop for supplying to the strobe input a sequence of strobe pulses having a controlled phase relative to the waveform under test, so that, in response to the sequence of strobe pulses, the comparator/integrator loop samples the waveform under test until the signal at output (33) assumes a predetermined relationship with respect to the waveform under test at a time/point at which the waveform under test is sampled.
Claim 10
Dependent Claim
37 words
A sampling waveform digitizer as defined in claim 7 further comprising control means coupled to the programmable delay means for controlling the time/point at which strobe pulses are supplied to the strobe input of the comparator/integrator loop.
Claim 11
Dependent Claim
25 words
A sampling waveform digitizer as defined in claim 8 further comprising conversion means coupled between the output of the comparator/integrator loop and the control means.
Claim 12
Dependent Claim
17 words
A sampling waveform digitizer as defined in claim 8 wherein the control means includes a digital computer.
Claim 13
Dependent Claim
74 words
A sampling waveform digitizer as defined in claim 10 wherein the programmable delay means is a digitally programmable delay means and the digital computer controls the time at which the waveform under test is repeatedly sampled by the comparator/integrator loop and wherein the computer operates so that the sampling time controlled by the computer causes the output of the comparator/integrator loop to be substantially equal to the value of the sampled waveform under test.
Claim 14
Dependent Claim
41 words
A sampling waveform digitizer as defined in claim 11 further comprising conversion means coupled between the output of the comparator/integrator loop and the computer for transferring to the computer information related to the value of the output of the comparator/integrator loop.
Claim 15
Dependent Claim
17 words
A sampling waveform digitizer as defined in claim 12 wherein the conversion means comprises an A/D converter.
Claim 16
Dependent Claim
17 words
A sampling waveform digitizer as defined in claim 13 wherein the conversion means comprises a digital voltmeter.
Claim 17
Dependent Claim
78 words
A sampling waveform digitizer as defined in claim 8 wherein the control means controls the time/point at which strobe pulses are supplied to the strobe input of the comparator/integrator loop so that the waveform under test is repeatedly sampled by the comparator/integrator loop at a time/point that causes the output of the comparator/integrator loop to be substantially equal to the value of the waveform under test at the time/point at which the waveform under test is repeatedly sampled.
Claim 18
Independent Claim
175 words
A method for characterizing a Device Under Test (DUT), the method comprising the steps of: (a) applying a test stimulus signal to the DUT so that the DUT generates a test waveform; (b) coupling the test waveform to a first input of a latching comparator; (c) coupling a signal related to the test stimulus signal to a programmable delay element so that the programmable delay element generates a sequence of strobe pulses; (d) coupling the strobe pulses to a strobe input of the latching comparator so that the latching comparator samples the test waveform in response to the strobe pulses; (e) integrating the output of the latching comparator so as to generate an integrated signal; (f) coupling the integrated signal to a second input of the latching comparator; and (g) controlling the operation of th programmable delay element so that the strobe pulses are generated at times that cause the value of the integrated signal to exhibit a predetermined relationship with respect to the value of the test waveform as sampled by the latching comparator.
Claim 19
Independent Claim
175 words
A method for characterizing a Device Under Test (DUT), the method comprising the steps of: (a) applying a test stimulus signal to the DUT so that the DUT generates a test waveform; (b) coupling the test waveform to a first input of a latching comparator; (c) coupling a signal related to the test stimulus signal to a programmable delay element so that the programmable delay element generates a sequence of strobe pulses; (d) coupling the strobe pulses to a strobe input of the latching comparator so that the latching comparator samples the test waveform in response to the strobe pulses; (e) integrating the output of the latching comparator so as to generate an integrated signal; (f) coupling the integrated signal to a second input of the latching comparator; and (g) controlling the operation of th programmable delay element so that the strobe pulses are generated at times that cause the value of the integrated signal to exhibit a predetermined relationship with respect to the value of the test waveform as sampled by the latching comparator.
Claim 20
Dependent Claim
24 words
A method for characterizing a DUT as defined in claim 16 wherein the operation of the programmable delay element is controlled by a computer.
Claim 21
Dependent Claim
31 words
A method for characterizing a DUT as defined in claim 17 further comprising the step of converting the value of the integrated signal to a form for storage or further processing.
Claim 22
Dependent Claim
30 words
A method for characterizing a DUT as defined in claim 18 wherein the value of the integrated signal is converted to digital form for storage or processing by the computer.
Claim 23
Dependent Claim
116 words
A method for characterizing a DUT as defined in claim 16 wherein a digital processing unit is programmable so as to control the programmable delay element so that, between (i) a time at which a signal related to the test stimulus signal is coupled to the programmable delay element and (ii) a time at which a strobe pulse is coupled from the programmable delay element to the strobe input of the latching comparator, a delay is inserted by the programmable delay element, which delay causes the value of the integrated signal to be substantially equal to the value of the test waveform at a time at which the test waveform is sampled by the latching comparator.
Claim 24
Dependent Claim
156 words
A sampling waveform digitizer for testing a waveform under test, the sampling waveform digitizer comprising: (a) a comparator/integrator loop having an inverting input (43), a noninverting input (44), a strobe input (42), and an output (33), said inverting input for accepting the waveform under test; (b) programmable delay means having an output coupled to the strobe input of the comparator/integrator loop for supplying to the strobe input a sequence of strobe pulses having a controlled phase relative to the waveform under test so that, in response to the sequence of strobe pulses, the comparator/integrator loop samples the waveform under test until the signal at output (33) assumes a predetermined relationship with respect to the waveform under test at a time/point at which the waveform under test is sampled; and (c) control means coupled to the programmable delay means for controlling the time/point at which strobe pulses are supplied to the strobe input of the comparator/integrator loop.
Claim 25
Dependent Claim
156 words
A sampling waveform digitizer for testing a waveform under test, the sampling waveform digitizer comprising: (a) a comparator/integrator loop having an inverting input (43), a noninverting input (44), a strobe input (42), and an output (33), said inverting input for accepting the waveform under test; (b) programmable delay means having an output coupled to the strobe input of the comparator/integrator loop for supplying to the strobe input a sequence of strobe pulses having a controlled phase relative to the waveform under test so that, in response to the sequence of strobe pulses, the comparator/integrator loop samples the waveform under test until the signal at output (33) assumes a predetermined relationship with respect to the waveform under test at a time/point at which the waveform under test is sampled; and (c) control means coupled to the programmable delay means for controlling the time/point at which strobe pulses are supplied to the strobe input of the comparator/integrator loop.
Claim 26
Independent Claim
143 words
A method for characterizing a test waveform, the method comprising the steps of: (a) coupling the test waveform to a first input of a latching comparator; (b) causing a programmable delay element to generate a sequence of strobe pulses; (c) coupling the strobe pulses to a strobe input of the latching comparator so that the latching comparator samples the test waveform in response to the strobe pulses; (d) integrating the output of the latching comparator so as to generate an integrated signal; (e) coupling the integrated signal to a second input of the latching comparator; and (f) controlling the operation of the programmable delay element so that the strobe pulses are generated at times that cause the value of the integrated signal to e exhibit a predetermined relationship with respect to the value of the test waveform as sampled by the latching comparator.
Claim 27
Independent Claim
143 words
A method for characterizing a test waveform, the method comprising the steps of: (a) coupling the test waveform to a first input of a latching comparator; (b) causing a programmable delay element to generate a sequence of strobe pulses; (c) coupling the strobe pulses to a strobe input of the latching comparator so that the latching comparator samples the test waveform in response to the strobe pulses; (d) integrating the output of the latching comparator so as to generate an integrated signal; (e) coupling the integrated signal to a second input of the latching comparator; and (f) controlling the operation of the programmable delay element so that the strobe pulses are generated at times that cause the value of the integrated signal to e exhibit a predetermined relationship with respect to the value of the test waveform as sampled by the latching comparator.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1992-02-21 | 1992-08-22 | 1993-02-21 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1996-02-21 | 1996-08-22 | 1997-02-21 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2000-02-21 | 2000-08-22 | 2001-02-21 | $7700.00 | Window Closed / Lapsed |