Differential magnetoresistive memory sensing

Claim 1

A state sensing circuit for sensing magnetic states of magnetic bit structures each comprising a memory film of a magnetoresistive, anisotropic, magnetic material between first and second terminal portions thereof, said circuit comprising: a first pair of said bit structures having an identity bit structure and a complementary bit structure as members of said first pair of bit structures, there being a first identity transverse conductor located across an electrical insulating layer from said first pair identity bit structure; a first identity series switching means having a pair of terminating regions, said first identity series switching means input being electrically connected at its said terminating regions in series between a first terminal means adapted for connection to a first source of current and said first pair identity bit structure at a said terminal portion thereof, said first identity series switching means being capable of selectively establishing a conductive path therethrough between said first identity series switching means pair of terminating regions to permit current to flow though said first pair identity bit structure; a first complementary series switching means having a pair of terminating regions, said first complementary series switching means being electrically connected at its said terminating regions in series between a second source of current and said first pair complementary bit structure at a said terminal portion thereof, said first complementary series switching means being capable of selectively establishing a conductive path therethrough between said first complementary series switching means pair of terminating regions to permit current to flow through said first pair complementary bit structure; a first identity transverse switching means having a pair of terminating regions, said first identity transverse switching means being electrically connected at its said terminating regions in series between a third terminal means adapted for connection to a third source of current and (with) said first identity transverse conductor, said first identity transverse switching means being capable of selectively establishing a conductive path therethrough between said first identity transverse switching means pair of terminating regions to permit current to flow through said first identity transverse conductor and past said first pair identity bit structure; a first identity sense switching means having a pair of terminating regions with one of said first identity sense switching means pair of terminating regions being electrically connected to said first pair identity bit structure at a said terminal portion thereof, said first identity sense switching means being capable of selectively establishing a conductive path therethrough between said first identity sense switching means pair of terminating regions to permit signals to be transmitted occurring at said first pair identity bit structure upon said first identity series switching means and said first identity transverse switching means permitting current flow as aforesaid; and a sense amplified having an output region, a first input region which is capable of a relatively high circuit impedance and which is electrically connected to that one remaining of said first identity sense switching means pair of terminating regions, and a second input region which is capable of a relatively high circuit impedance and which is electrically connected to said first pair complementary bit structure, and said sense amplified being capable of providing at said sense amplified output region a signal substantially similar to a signal provided at said sense amplified first input region but in an opposite magnitude direction to provide a gain ratio therebetween, said sense amplified being capable of providing at its output region a signal substantially similar to a signal provided at said sense amplified second input region in an identical magnitude direction to provide a gain ratio there between to thereby provide a signal at its output region which represents that difference occurring between signals occurring at its first and second input regions.