Patent US4837532A successfully refreshed from Google Patents.
US4837532A
Expired / Lapsed
US
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MMIC (monolithic microwave integrated circuit) voltage controlled analog phase shifter
Assignee: Lockheed Martin Corp
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Filing: 1987-10-26
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Granted: 1989-06-06
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Expires: 2007-10-26
Abstract
Abstract The invention relates to a voltage controlled analog phase shifter for operation at millimeter and microwave wavelengths using MMIC (Monolithic Microwave Integrated circuit) fabrication techniques. The phase shifter is formed of an artificial transmission line consisting of multiple unit elements in which each unit element contains a serial transmission line-inductance and a shunt diode capacitance which is variable as a function of an applied potential. In the design, the interconnecting transmission lines may be a small fraction of a wavelength, substantially less than one-quarter wavelength, and of high impedance relative to the characteristic impedance of the phase shifter. In consequence of the lumped design, each unit element, and a phase shifter using a plurality of such unit elements may be very small. The design also exhibits a low to negligible power consumption.
Inventors
- 👤 Richard J. Lang
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-01 14:45
CPC Classifications
H; H03; H03H; H03H11/00; H03H11/02; H03H11/16; H03H11/20
Claims Analysis
Total Claims: 7
Claim 1
Independent Claim
449 words
A monolithic microwave integrated circuit (MMIC) voltage controlled, analog phase shifter having a specified characteristic impedance (Zo) and specified worst case VSWR and requiring minimum substrate area at millimeter and microwave wavelengths; comprising: (A) a substrate of semi-insulating Gallium Arsenide having a ground plane on the under surface thereof, (B) a first input-output port, (C) a second input-output port, (D) an artificial transmission line comprising (1) an (n+1) fold succession of sections of microstrip transmission line, where n is an integer, consisting of said ground plane and a conductor formed on the upper surface of said substrate, the sections having a high impedance relative to said characteristic impedance Zo and being serially connected between said first and second input-output ports, the first and last sections having an inductance value of L/2 and the intermediate sections having an inductance value of L, all sections of transmission line having a length substantially shorter than one-quarter wavelength; (2) an n fold plurality of semi-conductor elements having at least a first and second terminal, each semi-conductor element having a variable capacitance of the value C, the capacitance thereof being a function of an applied voltage, the first terminal of each semi-conductor element being connected to a respective connection between transmission line sections and the second terminal coupled to substrate ground through a plated through hole, said semi-conductor elements being arranged along a first line in a sequence of odd numbered semi-conductor elements, and arranged along a second line in a sequence of even numbered semi-conductor elements, the second line being displaced from the first line and parallel thereto, the intermediate members of said (n+1) fold succession of transmission line sections extending between said succession of odd and even numbered semi-conductor elements in said first and second lines, and said plated through holes being arranged in a second pair of parallel lines, outside of and close to said two lines of semi-conductor elements to permit direct paths without cross-overs for each transmission line section between consecutive first terminals of said semi-conductor element and short connections between the second terminal of each semi-conductor element and ground, the semi-conductor elements in one line being staggered in relation to the semi-conductor elements in the other line to provide equal spacing and thereby equal length transmission sections between the first terminals of said semi-conductor elements, the values of L and C being chosen to achieve the desired characteristic impedance in approximate satisfaction of the expression Zo=(L/C-w.sup.2 L.sup.2 /4).sup.1/2 where w=the angular frequency 2 pi f neglecting transmission line and semi-conductor element parasitics, and (E) means for applying a control voltage between the first and second terminals of each variable capacitance semi-conductor element to achieve the desired phase shift.
Claim 2
Dependent Claim
449 words
A monolithic microwave integrated circuit (MMIC) voltage controlled, analog phase shifter having a specified characteristic impedance (Zo) and specified worst case VSWR and requiring minimum substrate area at millimeter and microwave wavelengths; comprising: (A) a substrate of semi-insulating Gallium Arsenide having a ground plane on the under surface thereof, (B) a first input-output port, (C) a second input-output port, (D) an artificial transmission line comprising (1) an (n+1) fold succession of sections of microstrip transmission line, where n is an integer, consisting of said ground plane and a conductor formed on the upper surface of said substrate, the sections having a high impedance relative to said characteristic impedance Zo and being serially connected between said first and second input-output ports, the first and last sections having an inductance value of L/2 and the intermediate sections having an inductance value of L, all sections of transmission line having a length substantially shorter than one-quarter wavelength; (2) an n fold plurality of semi-conductor elements having at least a first and second terminal, each semi-conductor element having a variable capacitance of the value C, the capacitance thereof being a function of an applied voltage, the first terminal of each semi-conductor element being connected to a respective connection between transmission line sections and the second terminal coupled to substrate ground through a plated through hole, said semi-conductor elements being arranged along a first line in a sequence of odd numbered semi-conductor elements, and arranged along a second line in a sequence of even numbered semi-conductor elements, the second line being displaced from the first line and parallel thereto, the intermediate members of said (n+1) fold succession of transmission line sections extending between said succession of odd and even numbered semi-conductor elements in said first and second lines, and said plated through holes being arranged in a second pair of parallel lines, outside of and close to said two lines of semi-conductor elements to permit direct paths without cross-overs for each transmission line section between consecutive first terminals of said semi-conductor element and short connections between the second terminal of each semi-conductor element and ground, the semi-conductor elements in one line being staggered in relation to the semi-conductor elements in the other line to provide equal spacing and thereby equal length transmission sections between the first terminals of said semi-conductor elements, the values of L and C being chosen to achieve the desired characteristic impedance in approximate satisfaction of the expression Zo=(L/C-w.sup.2 L.sup.2 /4).sup.1/2 where w=the angular frequency 2 pi f neglecting transmission line and semi-conductor element parasitics, and (E) means for applying a control voltage between the first and second terminals of each variable capacitance semi-conductor element to achieve the desired phase shift.
Claim 3
Dependent Claim
50 words
The phase shifter set forth in claim 1 wherein said semi-conductor elements are field effect transistors, each having source, drain and gate electrodes, said source and drain electrodes being connected to said second terminal of the element, and said gate electrode being connected to said first terminal of the element.
Claim 4
Dependent Claim
51 words
The phase shifter set forth in claim 1 wherein said semi-conductor elements are high electron mobility transistors each having source, drain and gate electrodes, said source and drain electrodes being connected to said second terminal of the element, and said gate electrode being connected to said first terminal of the element.
Claim 5
Dependent Claim
70 words
The phase shifter set forth in claim 1 wherein said plurality of plated through holes is approximately n/2 in number, the semi-conductor elements in one line being connected in pairs to individual plated through holes and the semi-conductor elements in the other line are connected in pairs to individual plated through holes, so that the succession of plated surfaces on said substrate is interrupted to prevent an undesired stripline mode.
Claim 6
Dependent Claim
15 words
The phase shifter set forth in claim 1 wherein said semi-conductor elements are Schottky diodes.
Claim 7
Dependent Claim
15 words
The phase shifters set forth in claim 1 wherein said semi-conductor elements are varactor diodes.
References Cited (Backward Citations)
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1992-06-05 | 1992-12-05 | 1993-06-06 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1996-06-05 | 1996-12-05 | 1997-06-06 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2000-06-05 | 2000-12-05 | 2001-06-06 | $7700.00 | Window Closed / Lapsed |