Drive circuit for operating electroluminescent display with enhanced contrast

Claim 2

A D.C. electroluminescent display with enhanced contrast and brightness, comprising: a plurality of conducting row and column electrodes disposed in an intersecting overlapping relation to form a matrix; a plurality of phosphor pixel elements disposed between said row and column electrodes in conductive contact with said electrodes and adjacent to the points of intersection of said electrodes, each pixel having means for emitting light in response to a D.C, voltage which exceeds a defined threshold voltage; means for sequentially scanning each one of said row electrodes with a first predefined energization row voltage and for applying a second predefined de-energization row voltage to the row electrodes which are not being scanned; and means for applying a selected pattern of first column energization and second column de-energization voltages to said column electrodes for the scan of each row electrode, at least the first row or the first column energization voltages being greater than said threshold voltage, the pixels adjacent to intersecting scanned row electrodes and energized column electrodes lighting in response to a total energization voltage which exceeds said threshold voltage and which is defined by said first row energization and first column energization voltages; all other pixels being unlighted in response to total voltages which are defined less than said threshold voltage by row and column voltages that include at least one of said de-energization voltages.

Claim 3

The display of claim 1, wherein said de-energization row voltage has the same polarity as the column energization voltage.

Claim 4

The display of claim 1, wherein said column de-energization voltage has the same polarity as the row energization voltage.

Claim 7

The method of claim 4, wherein at least one of said steps of defining de-energization voltages includes the step of defining a nonzero de-energization voltage.

Claim 8

The method of claim 4, wherein the defined column energization voltage has a polarity that is not different than the polarity of the row de-energization voltage and the column de-energization voltage has a polarity that is not different than the polarity of the row energization voltage.

Claim 9

In a computer display system of a type which transmits successive frames of data, each frame having a plurality of rows of character data, and generates a window signal that includes a horizontal blanking interval for each row of transmitted character data and a vertical blanking interval for each frame of character data, a load signal for each character which is transmitted and a horizontal sync signal for each row of displayed character data, the improvement comprising: an electroluminescent display panel, including a plurality of conducting row and column electrodes disposed in intersecting overlapping relation to form a matrix; a plurality of phosphor pixel elements disposed at the points of intersection of said electrodes; means for sequentially scanning each one of said row electrodes with a predefined D.C. row energization voltage and for simultaneously applying a predefined D.C. de-energization row voltage to the row electrode which are not scanned; and means for applying a selected pattern of D.C. column energization and D.C. column de-energization voltages to said column electrodes for the scan of each row electrode, at least the row or the column energization voltages being greater than a threshold voltage required to light a pixel, the pixels of the scanned row in the intersecting energized columns receiving a total energization voltage which exceeds said threshold voltage for lighting the pixels to form characters corresponding to a display portion of said character data, all other pixels having a total voltage less than said threshold voltage so that said other pixels are not lighted; clock means for generating clock pulses; means for detecting the beginning of each row of a display portion of said character data; means for detecting the line format for displaying each row of character data; means for timing said clock signals from the beginning of the display portion of each row of character data and adjusting the phase of said clock pulses in response to the detected line format for the row; and means responsive to said clock means for forming said pattern of column energization and de-energization voltages corresponding to the display portion of each row of character data and displaying the characters of each row in the detected line format for the row.

Claim 10

In a computer display system of a type which transmits successive frames of data, each frame having a plurality of rows of character data, and generates a window signal that includes a horizontal blanking interval for each row of transmitted character data and a vertical blanking interval for each frame of character data, a load signal for each character which is transmitted and a horizontal sync signal for each row of displayed character data, the improvement comprising: an electroluminescent display panel, including a plurality of conducting row and column electrodes disposed in intersecting overlapping relation to form a matrix; a plurality of phosphor pixel elements disposed at the points of intersection of said electrodes; means for sequentially scanning each one of said row electrodes with a predefined D.C. row energization voltage and for simultaneously applying a predefined D.C. de-energization row voltage to the row electrode which are not scanned; and means for applying a selected pattern of D.C. column energization and D.C. column de-energization voltages to said column electrodes for the scan of each row electrode, at least the row or the column energization voltages being greater than a threshold voltage required to light a pixel, the pixels of the scanned row in the intersecting energized columns receiving a total energization voltage which exceeds said threshold voltage for lighting the pixels to form characters corresponding to a display portion of said character data, all other pixels having a total voltage less than said threshold voltage so that said other pixels are not lighted; clock means for generating clock pulses; means for detecting the beginning of each row of a display portion of said character data; means for detecting the line format for displaying each row of character data; means for timing said clock signals from the beginning of the display portion of each row of character data and adjusting the phase of said clock pulses in response to the detected line format for the row; and means responsive to said clock means for forming said pattern of column energization and de-energization voltages corresponding to the display portion of each row of character data and displaying the characters of each row in the detected line format for the row.

Claim 11

The system of claim 7, wherein said de-energization row voltage is a positive voltage which produces with a positive column energization voltage a total voltage less than said threshold voltage.

Claim 12

The system of claim 7, wherein said column de-energization voltage is a negative voltage which produces with a negative row energization voltage a total voltage less than said threshold voltage.

Claim 13

The system of claim 7, wherein said means for detecting the beginning of the display portion of a row of character data includes means for detecting the trailing edge of said window signal and for recognizing the beginning of the display portion upon detection of the next following load signal.

Claim 14

The system of claim 7, wherein said means for detecting the line format includes means for differentiating a line format having 80 columns from a line format having 40 columns.

Claim 15

The system of claim 7, wherein said means for detecting the line format includes means for counting the number of load signals which occur during a horizontal sync signal for a row of data and for determining the line format from said number on a row by row basis.

Claim 16

The system of claim 12, wherein a count of eight load pulses designates a line format having 80 columns.

Claim 17

The system of claim 12, wherein a count of less than eight load pulses designates the 40-column line format.

Claim 18

The system of claim 7, wherein said means for detecting the line format includes means for detecting the frequency of the load signals which occur during a horizontal sync signal and for determining the line format from said frequency.

Claim 19

The system of claim 15, including means for identifying an 80-column line format when the higher of two preselected frequencies is detected and for identifying a 40-column line format when the lower of said two preselected frequencies is detected.

Claim 20

The system of claim 7, wherein said means for timing includes means for timing said clock signals from the end of said horizontal sync signal if a 40-column line format is detected and for timing said clock signals from one pixel after the end of said horizontal sync signal if an 80-column line format is detected.

Claim 21

The system of claim 7, wherein said means for timing includes means for timing said clock signals from the beginning of the display portion of a row of character data if a 40-column line format is detected and for timing said clock signals from the beginning of the display portion of a row of character display data and additionally shifting the phase of the clock means by 90° if an 80-column line format is detected.