Fluorescent light dimming

Claim 2

A control arrangement for dimming a fluorescent light, said fluorescent light being supplied with an electrical signal having an electrical signal waveform of varying magnitudes and having both a positive and a negative half cycle, said control arrangement positioning a notch of reduced signal magnitude within said electrical signal waveform wherein said fluorescent light has an illumination level dependent upon the position of said notch, said arrangement comprising: load control means for controlling the supply of said electrical signal to said fluorescent light, said load control means comprising a first gate turn off device and a first SCR for controlling said electrical signal during said positive half cycle and a second gate turn off device and a second SCR for controlling said electrical signal during said negative half cycle, said gate turn off devices conducting during their respective half cycles prior to said notch and said first and second SCRs for conducting during their respective half cycles subsequent to said notch, neither said gate turn off devices nor said SCRs conducting during the notch in their respective half cycles, and a first parallel switch and a second parallel switch for connection in parallel to said fluorescent light, said first parallel switch being turned on during said positive half cycle and said second parallel switch being turned on during said negative half cycle; light level determining means for providing a light level signal having a frequency determinative of the amount of light to be emitted by said fluorescent light; and light control means responsive to said electrical signal and a counter responsive to the frequency of said light level signal for controlling said load control means to position said notch within said electrical signal waveform in accordance with said light level signal.

Claim 3

The arrangement of claim 1 wherein said load control means comprises at least one gate turn off device for conducting prior to said notch and at least one SCR for conducting subsequent to said notch during said electrical signal waveform, both said gate turn off device and said SCR being nonconducting during said notch.

Claim 4

The arrangement of claim 2 wherein said light control means comprises GTO logic means responsive to said counter for turning on said first and second gate turn off devices at the beginning of their respective half cycles and for turning said first and second gate turn off devices off at the beginning of the notch in their respective half cycles, said light control means further comprises SCR logic means responsive to said counter for turning on said first and second SCRs at the end of their notches in their respective half cycles and for maintaining said first and second SCRs on during the remainder of their respective half cycles.

Claim 5

The arrangement of claim 3 wherein said light control means comprises positive and negative half cycle signal means responsive to said electrical signal for providing a positive half cycle signal during the positive half cycle and a negative half cycle signal during said negative half cycle, said positive and negative half cycle signal means including reset means for resetting said counter at zero crossover points in said electrical signal.

Claim 6

The arrangement of claim 4 wherein said gate turn off logic means comprises first gate turn off control means responsive to said positive half cycle signal for allowing said first gate turn off device to be controlled during the positive half cycle and second gate turn off control means responsive to said negative half cycle signal for allowing said second gate turn off device to be controlled during said negative half cycle, said SCR logic means comprising first SCR control means responsive to said positive half cycle means for allowing said first SCR to be controlled during positive half cycles and second SCR control mean responsive to said negative half cycle signal for allowing said second SCR to be controlled during said negative half cycle.

Claim 7

The arrangement of claim 1 wherein said electrical signal waveform has a positive half cycle and a negative half cycle and wherein said load control means comprises a first parallel switch and a second parallel switch for connection in parallel to said fluorescent light, said first parallel switch being turned on during said positive half cycle and said second parallel switch being turned on during said negative half cycle.

Claim 8

The arrangement of claim 6 wherein said light control means comprises positive and negative half cycle signal mean responsive to said electrical signal for providing a positive half cycle signal during the positive half cycle and a negative half cycle signal during said negative half cycle, said positive and negative half cycle signal means including reset means for resetting said counter at zero crossover points in said electrical signal waveform.

Claim 9

The arrangement of claim 1 wherein said electrical signal waveform has reference points and wherein said light control means comprises reset means responsive to said reference points for resetting said counter at said reference points.

Claim 10

The arrangement of claim 1 wherein said light control means comprises full on means responsive to a substantially full on signal for controlling said light control means for continually energizing said fluorescent light.

Claim 11

The arrangement of claim 9 wherein said light control means comprises full off means responsive to a substantially off light level signal for controlling said load control means for maintaining said electric light in a substantially off condition.

Claim 12

The arrangement of claim 1 wherein said light control means comprises means for requiring a minimum on time of said load control means prior to said notch except when said light is to be full off to prevent flicker free operation.

Claim 13

A control arrangement for dimming a fluorescent light, said fluorescent light being supplied with an electrical signal having an electrical signal waveform of varying magnitude and having both a positive and a negative half cycle, said electrical signal waveform having a notch of reduced signal magnitude therein, said notch having a leading edge and a trailing edge with a center between said edges, said control arrangement controlling the position of said notch by positioning said edges and said center of said notch within said electrical signal waveform wherein said fluorescent light has an illumination level dependent upon the position of said notch, said arrangement comprising: load control means for controlling the supply of said electrical signal to said fluorescent light, said load control means comprising a first gate turn off device and a first SCR for controlling said electrical signal during said positive half cycle and a second gate turn off device and a second SCR for controlling said electrical signal during said negative half cycle, said gate turn off devices conducting during their respective half cycles prior to said notch and said first and second SCRs for conducting during their respective half cycles subsequent to said notch, neither said gate turn off devices nor said SCRs conducting during the notch in their respective half cycles, and a first parallel switch and a second parallel switch for connection in parallel to said fluorescent light, said first parallel switch being turned on during said positive half cycle and said second parallel switch being turned on during said negative half cycle; light level determining means for providing a light level signal having a frequency determinative of the amount of light to be emitted by said fluorescent light; and light control means responsive to said electrical signal and a counter responsive to the frequency of said light level signal for controlling said load control means to position said notch by positioning said edges and said center within said electrical signal waveform in accordance with said light level signal.

Claim 14

A control arrangement for dimming a fluorescent light, said fluorescent light being supplied with an electrical signal having an electrical signal waveform of varying magnitude and having both a positive and a negative half cycle, said electrical signal waveform having a notch of reduced signal magnitude therein, said notch having a leading edge and a trailing edge with a center between said edges, said control arrangement controlling the position of said notch by positioning said edges and said center of said notch within said electrical signal waveform wherein said fluorescent light has an illumination level dependent upon the position of said notch, said arrangement comprising: load control means for controlling the supply of said electrical signal to said fluorescent light, said load control means comprising a first gate turn off device and a first SCR for controlling said electrical signal during said positive half cycle and a second gate turn off device and a second SCR for controlling said electrical signal during said negative half cycle, said gate turn off devices conducting during their respective half cycles prior to said notch and said first and second SCRs for conducting during their respective half cycles subsequent to said notch, neither said gate turn off devices nor said SCRs conducting during the notch in their respective half cycles, and a first parallel switch and a second parallel switch for connection in parallel to said fluorescent light, said first parallel switch being turned on during said positive half cycle and said second parallel switch being turned on during said negative half cycle; light level determining means for providing a light level signal having a frequency determinative of the amount of light to be emitted by said fluorescent light; and light control means responsive to said electrical signal and a counter responsive to the frequency of said light level signal for controlling said load control means to position said notch by positioning said edges and said center within said electrical signal waveform in accordance with said light level signal.

Claim 15

The arrangement of claim 12 wherein said load control means comprises at least one gate turn off device for conducting prior to said notch and at least one SCR for conducting subsequent to said notch during said electrical signal waveform, both said gate turn off device and said SCR being nonconducting during said notch.

Claim 16

The arrangement of claim 13 wherein said light control means comprises GTO logic means responsive to said counter for turning on said first and second gate turn off devices at the beginning of their respective half cycles and for turning said first and second gate turn off devices off at the beginning of the notch in their respective half cycles, said light control means further comprises SCR logic means responsive to said counter for turning on said first and second SCRs at the end of their notches in their respective half cycles and for maintaining said first and second SCRs on during the remainder of their respective half cycles.

Claim 17

The arrangement of claim 14 wherein said light control means comprises positive and negative half cycle signal means responsive to said electrical signal for providing a positive half cycle signal during the positive half cycle and a negative half cycle signal during said negative half cycle, said positive and negative half cycle signal means including reset means for resetting said counter at zero crossover points in said electrical signal.

Claim 18

The arrangement of claim 15 wherein said gate turn off logic means comprises first gate turn off control means responsive to said positive half cycle signal for allowing said first gate turn off device to be controlled during the positive half cycle and second gate turn off control means responsive to said negative half cycle signal for allowing said second gate turn off device to be controlled during said negative half cycle, said SCR logic means comprising first SCR control means responsive to said positive half cycle means for allowing said first SCR to be controlled during positive half cycles and second SCR control means responsive to said negative half cycle signal for allowing said second SCR to be controlled during said negative half cycle.

Claim 19

The arrangement of claim 16 wherein said electrical signal waveform has a positive half cycle and a negative half cycle and wherein said load control means comprises a first parallel switch and a second parallel switch for connection in parallel to said fluorescent light, said first parallel switch being turned on during said positive half cycle and said second parallel switch being turned on during said negative half cycle.

Claim 20

The arrangement of claim 17 wherein said light control means comprises positive and negative half cycle signal means responsive to said electrical signal for providing a positive half cycle signal during the positive half cycle and a negative half cycle signal during said negative half cycle, said positive and negative half cycle signal means including reset means for resetting said counter at zero crossover points in said electrical signal waveform.

Claim 21

The arrangement of claim 17 wherein said electrical signal waveform has reference points and wherein said light control means comprises reset means responsive to said reference points for resetting said counter at said reference points.

Claim 22

The arrangement of claim 17 wherein said light control means comprises full on means responsive to a substantially full on signal for controlling said load control means for continually energizing said fluorescent light.

Claim 23

The arrangement of claim 20 wherein said light control means comprises full off means responsive to a substantially off light level signal for controlling said load control means for maintaining said electric light in a substantially off condition.

Claim 24

The arrangement of claim 17 wherein said light control means comprises means for requiring a minimum on time of said load control means prior to said notch except when said light is to be full off to prevent flicker free operation.

Claim 25

The switch of claim 17 wherein said gate turn off device means comprises a first gate turn off device having a gate and first and second terminals, a second gate turn off device having a gate and first and second terminals, wherein said SCR means comprises a first SCR having a gate and first and second terminals, a second SCR having a gate and first and second terminals, wherein said connecting means comprises first connecting means connecting said second terminals of said first gate turn off device and said first SCR to said source terminal, second connecting means connecting said second terminals of said second gate turn off device and said second SCR to said load terminal, and third connecting means connecting said first terminals of said first and second gate turn off devices and said first and second SCRs together and to said source and load terminals so that said first gate turn off device is connected in parallel to said first SCR and said second gate turn off device is connected in parallel to said second SCR, and wherein said control means is connected to said gates of said first and second gate turn off devices and of said first and second SCRs for controlling current flow between said source and load terminals through said first gate off device and said first SCR during positive half cycles of said electrical signal and through said second gate turn off device and said second SCR during negative half cycles of said electrical signal.

Claim 26

The switch of claim 23 wherein said control means includes means for turning on said first and second gate turn off devices at zero points in the electrical signal and for turning off said first and second gate turn off devices at a selected non-zero phase in their respective half cycles.

Claim 27

The switch of claim 24 wherein said control means comprises means for turning on said first and second SCRs at corresponding points in said respective positive and negative half cycles a predetermined amount of time after said corresponding first and second gate turn off devices are turned off.