US4914491A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Junction field-effect transistors formed on insulator substrates
Assignee: Kopin Corp
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Filing: 1989-06-29
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Granted: 1990-04-03
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Expires: 2009-06-29
Abstract
Abstract A junction field effect transistor formed on insulator substrates particularly oxide substrates and having a polysilicon vertical control gate region formed of a cross member and two end members orthogonal thereto. The vertical control gate is formed over an n-channel in a Si island, the n-channel is located beneath the cross member, with p + junction gate regions laterally disposed on either side of the n-channel and n + drain and gate regions laterally orthogonal thereto in Si island.
Inventors
- 👤 Duy-Phach Vu
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-31 11:15
CPC Classifications
H; H10; H10D; H10D30/00; H10D30/01; H10D30/051; H10D30/0512; H10D30/80; H10D30/83; H10D30/832
Claims Analysis
Total Claims: 10
Claim 1
Independent Claim
156 words
A JFET device formed on an island of Si over an insulator film over an Si substrate comprising: (a) an n-channel region in said Si island having one cross portion and two end portions, said end portions extending orthogonal to said cross portion; (b) n + source and drain regions at opposite ends of the end portions of said n-channel region; (c) p + junction gate regions extending laterally from opposite sides of said cross-portion of said n-channel region; and (d) a first control gate extending over said channel region and separated from the n-channel region by an insulator and not extending over said junction gate regions, said first control gate being co-extensive with said n-channel region for controlling the surface potential in the n-channel region; and (e) a second control gate on said Si substrate beneath said channel region for controlling, in conjunction with said first control gate, the surface potential of the n-channel region.
Claim 2
Dependent Claim
156 words
A JFET device formed on an island of Si over an insulator film over an Si substrate comprising: (a) an n-channel region in said Si island having one cross portion and two end portions, said end portions extending orthogonal to said cross portion; (b) n + source and drain regions at opposite ends of the end portions of said n-channel region; (c) p + junction gate regions extending laterally from opposite sides of said cross-portion of said n-channel region; and (d) a first control gate extending over said channel region and separated from the n-channel region by an insulator and not extending over said junction gate regions, said first control gate being co-extensive with said n-channel region for controlling the surface potential in the n-channel region; and (e) a second control gate on said Si substrate beneath said channel region for controlling, in conjunction with said first control gate, the surface potential of the n-channel region.
Claim 3
Dependent Claim
109 words
A JFET device formed on a semiconductor island over an insulator comprising: a channel semiconductor region of a first type of conductivity in said island and having a cross-portion with end portions extending in a direction orthogonal to said cross-portion; source and drain regions of the same type of conductivity as the channel located on opposite ends of the end portions of the channel region; junction gate regions having the opposite conductivity as that of the channel and that extend laterally from the cross-portion of said channel region between said source and drain regions; and a control gate extending over said channel region and co-extensive therewith and insulated therefrom.
Claim 4
Dependent Claim
109 words
A JFET device formed on a semiconductor island over an insulator comprising: a channel semiconductor region of a first type of conductivity in said island and having a cross-portion with end portions extending in a direction orthogonal to said cross-portion; source and drain regions of the same type of conductivity as the channel located on opposite ends of the end portions of the channel region; junction gate regions having the opposite conductivity as that of the channel and that extend laterally from the cross-portion of said channel region between said source and drain regions; and a control gate extending over said channel region and co-extensive therewith and insulated therefrom.
Claim 5
Dependent Claim
15 words
The JFET device of claim 1 wherein the first control gate is formed of polysilicon.
Claim 6
Dependent Claim
30 words
The JFET device of claim 2 wherein the insulator is formed on an Si substrate and including an additional control gate located on the Si substrate beneath the channel region.
Claim 7
Dependent Claim
35 words
The JFET device of claim 2 wherein the control gate has an elongated longitudinally extending central portion and transverse portions with sides extending orthogonal to a center line through the longitude of said central portion.
Claim 8
Dependent Claim
15 words
The JFET device of claim 1 wherein the insulator is comprised of SiO 2 .
Claim 9
Dependent Claim
13 words
The JFET device of claim 1 wherein the insulator is comprised of sapphire.
Claim 10
Dependent Claim
14 words
The JFET device of claim 2 wherein the control gate is formed of polysilicon.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1993-04-02 | 1993-10-02 | 1994-04-03 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1997-04-02 | 1997-10-02 | 1998-04-03 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2001-04-02 | 2001-10-02 | 2002-04-03 | $7700.00 | Window Closed / Lapsed |