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US4922277A Expired / Lapsed US ⏱️ 0.0 years remaining

Silicon wafer photoresist developer

Assignee: United States Department of the Air Force
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Filing: 1988-11-28
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Granted: 1990-05-01
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Expires: 2008-11-28
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Abstract

Abstract To provide for improved uniformity of photoresist developing of silicon wafers, developer solution is injected via an inlet port through a set of holes in a surface in a chuck and distributed across the wafer thereby developing the wafer pattern. A second set of holes in the same surface of the chuck act as exhaust outlets for the used developer. An end point detector is associated with an outlet duct. This design provides great uniformity potential since it is a single wafer system, and the holes and fluid flows can be adjusted as needed. Also, this design requires minimum developer volume which means end point detection can take place using the waste developer at the outlet. Test such as optical density or color, PH or normality, density, or others can detect photoresist content in effluent to determine completion.

Inventors

  • 👤 Robert J. Carlson
  • 👤 Michael D. Grimm

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-11-02 14:46
CPC Classifications
G; G03; G03F; G03F7/00; G03F7/26; G03F7/30; G03F7/3021; G03F7/3028; Y; Y10; Y10S; Y10S134/00; Y10S134/902

Claims Analysis

Total Claims: 5
Claim 1
Independent Claim 95 words
Apparatus for developing resist on an integrated circuit wafer comprising: a chuck having a surface with a plurality of inlet holes and a plurality of outlet holes, an outer wall with means adapted to receive said wafer so that it is spaced adjacent to said surface to form a chamber, inlet means for supplying developer through said inlet holes into the chamber, outlet means for removing used developer from the chamber via said outlet holes; and detector means located at said outlet means for performing endpoint detection to determine completion of development of the resist.
Claim 2
Dependent Claim 95 words
Apparatus for developing resist on an integrated circuit wafer comprising: a chuck having a surface with a plurality of inlet holes and a plurality of outlet holes, an outer wall with means adapted to receive said wafer so that it is spaced adjacent to said surface to form a chamber, inlet means for supplying developer through said inlet holes into the chamber, outlet means for removing used developer from the chamber via said outlet holes; and detector means located at said outlet means for performing endpoint detection to determine completion of development of the resist.
Claim 3
Dependent Claim 28 words
Apparatus according to claim 1, wherein said inlet holes and said outlet holes are distributed over said surface so as to provide for uniform development of the resist.
Claim 4
Dependent Claim 20 words
Apparatus according to claim 2, further including a vent in said outer wall for permitting the escape of gas bubbles.
Claim 5
Dependent Claim 203 words
Apparatus according to claim 3, wherein said chuck comprises a body having a bottom and a cylindrical side wall forming a cavity, with a ledge near the bottom and a lip near the top in the side wall; a flow guide having upper and lower surfaces, with its lower surface resting on the ledge to leave a lower cavity between it and the bottom of said body, and its upper surface being said surface with a plurality of inlet holes and a plurality of outlet holes, with the inlet holes extending through the flow guide to said lower cavity, wherein said lip forms said means adapted to receive said wafer; wherein said inlet means includes an inlet duct extending through said body into said lower cavity, and said outlet means includes an outlet duct extending through said cylindrical side wall and means in the flow guide connecting the outlet duct to the outlet holes; a vent in said outer wall for permitting the escape of gas bubbles, the vent being across from the inlet duct; and a cover for fastening to said body to hold the wafer in place and to prevent the developer from getting on a back side of the wafer.

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1993-04-30 1993-10-30 1994-05-01 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1997-04-30 1997-10-30 1998-05-01 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 2001-04-30 2001-10-30 2002-05-01 $7700.00 Window Closed / Lapsed

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