Patent US4946709A successfully refreshed from Google Patents.
US4946709A
Expired / Lapsed
US
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Method for fabricating hybrid integrated circuit
Assignee: Mitsubishi Electric Corp
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Filing: 1989-08-17
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Granted: 1990-08-07
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Expires: 2009-08-17
Abstract
Abstract A method for fabricating a hybrid IC substrate comprises the steps of: preparing an insulating ceramic substrate having a major surface; baking one or more conductors of a first group formed of high melting point metal or alloy thereof on the major surface; covering the conductors of the first group with a first plated film formed by electroless plating; forming an insulating porous active including a glass component and a small amount of a metal component having a catalytic action for electroless plating on the first plated film; and forming one or more conductors of a second group by electroless plating on the active layer, whereby portions of the active layer sandwiched between the conductors of the first and second groups are rendered conductive.
Inventors
- 👤 Mitsuyuki Takada
- 👤 Eishi Gofuku
- 👤 Hayato Takasago
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-29 18:56
CPC Classifications
H; H05; H05K; H05K3/00; H05K3/46; H05K3/4644; H05K3/4661; H10; H10W; H10W70/00; H10W70/01; H10W70/05; H10W99/00; H05K1/00; H05K1/02; H05K1/03; H05K1/0306; H05K1/09; H05K1/092; H05K2201/00; H05K2201/01; H05K2201/0104; H05K2201/0116; H05K2201/02; H05K2201/0203; H05K2201/0206; H05K2201/0236; H05K2201/03; H05K2201/0332; H05K2201/0335; H05K2201/0347; H05K2203/00; H05K2203/07; H05K2203/0703; H05K2203/072; H05K3/10; H05K3/18; H05K3/181; H05K3/182; H05K3/184; H05K3/22; H05K3/24; H05K3/245; H05K3/246; H05K3/465; Y; Y10; Y10T; Y10T29/00; Y10T29/49; Y10T29/49002; Y10T29/49082; Y10T29/49099
Claims Analysis
Total Claims: 10
Claim 1
Independent Claim
119 words
The method for fabricating a hybrid IC substrate comprising the steps of: preparing an insulating ceramic substrate having a major surface; baking a first conductor, selected from a first group of high melting point metals, on said major surface; covering said first conductor with a first plated film formed by electroless plating; forming an insulating porous active layer including a glass component having a catalytic action for electroless plating on said first plated film, and forming a second conductor selected from a second group of metals by electroless plating on said active layer, and rendering portions of said active layer located between said conductors conductive, thereby bringing said conductors into electrical contact with each other through said active layer.
Claim 2
Independent Claim
119 words
The method for fabricating a hybrid IC substrate comprising the steps of: preparing an insulating ceramic substrate having a major surface; baking a first conductor, selected from a first group of high melting point metals, on said major surface; covering said first conductor with a first plated film formed by electroless plating; forming an insulating porous active layer including a glass component having a catalytic action for electroless plating on said first plated film, and forming a second conductor selected from a second group of metals by electroless plating on said active layer, and rendering portions of said active layer located between said conductors conductive, thereby bringing said conductors into electrical contact with each other through said active layer.
Claim 3
Dependent Claim
38 words
The method in accordance with claim 1, wherein said active layer is formed by applying a paste including a glass component and a small amount of metal having a catalytic action for electroless plating, and baking said paste.
Claim 4
Dependent Claim
24 words
The method in accordance with claim 2, wherein said active layer is baked at a temperature in the range from 400° to 900° C.
Claim 5
Dependent Claim
39 words
The method in accordance with claim 1, wherein said active layer is formed by baking a porous insulating layer including a glass component, and then absorbing a metal having a catalytic action for electroless plating into said insulating layer.
Claim 6
Dependent Claim
15 words
The method in accordance with claim 1, wherein said high melting point metal is tungsten.
Claim 7
Dependent Claim
18 words
The method in accordance with claim 1, wherein said first plated film is formed by electroless nickelboron plating.
Claim 8
Dependent Claim
19 words
A method in accordance with claim 1, wherein said first plated film contains 99 wt% or more of nickel.
Claim 9
Independent Claim
135 words
The method for fabricating a hybrid IC substrate comprising the steps of: preparing an insulating ceramic substrate having a major surface; baking a tungsten metal conductor on said major surface; covering said tungsten metal conductor with a first plated film formed by electroless nickel-baron plating; baking a porous insulating active layer including a glass component having a catalytic action for electroless plating on first plated film at a temperature in the range of from 400° C. to 900 C.; and forming a second metal conductor selected from a group of metals including copper and nickel by electroless plating on said active layer, and rendering portions of said active layer located between said tungsten metal conductor and said second metal conductor conductive, thereby bringing said conductors into electrical contact with each other through said active layer.
Claim 10
Independent Claim
135 words
The method for fabricating a hybrid IC substrate comprising the steps of: preparing an insulating ceramic substrate having a major surface; baking a tungsten metal conductor on said major surface; covering said tungsten metal conductor with a first plated film formed by electroless nickel-baron plating; baking a porous insulating active layer including a glass component having a catalytic action for electroless plating on first plated film at a temperature in the range of from 400° C. to 900 C.; and forming a second metal conductor selected from a group of metals including copper and nickel by electroless plating on said active layer, and rendering portions of said active layer located between said tungsten metal conductor and said second metal conductor conductive, thereby bringing said conductors into electrical contact with each other through said active layer.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1993-08-06 | 1994-02-05 | 1994-08-07 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1997-08-06 | 1998-02-05 | 1998-08-07 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2001-08-06 | 2002-02-05 | 2002-08-07 | $7700.00 | Window Closed / Lapsed |