Fabrication method for high speed and high packing density semiconductor device (BiCMOS)

Claim 1

In a fabrication method for high speed and high packing density semiconductor devices, the steps of: forming an N + -type buried layer upon a P-type substrate; growing an N-epitaxial layer upon it; depositing an oxide film and carrying out a masking process for defining a P-well; implanting and diffusing an impurity down to the N-epitaxial layer in order to form a P-well; removing the oxide film on the P-well and N-epitaxial layer; growing a buffer oxide film, and depositing a nitride film on the oxide film upon the P-well and N-epitaxial layer; growing an oxide film in order to complete a device isolation region, after the formation of a P + junction isolation region; growing a gate oxide film of CMOS after removal of the buffer oxide film; ion-implanting an impurity in order to form a base and a collector of bipolar transistors; after removal of photoresist film, depositing polysilicon, and implanting an impurity in order to make the polysilicon an N + type; depositing an oxide film upon the N + polysilicon; forming gates of CMOS elements and emitters and collectors of bipolar transistors; implanting an impurity in order to form source/drains of PMOS devices; implanting an impurity in order to form source/drains of NMOS devices; depositing an oxide film, and carrying out an etching so that an oxide film remains on a side wall of the N + type polysilicon; depositing polysilicon upon oxide film and doping an impurity by a thermal diffusion method or an ion-implantation method to make the polysilicon a P + type; carrying out a diffusion in order to form a P + extrinsic base area; and removing photoresist film of the masking area so that the polysilicon remains at the base region of the bipolar transistor.