Field effect transistor for microstrip mounting and microstrip-mounted transistor assembly

Claim 2

A field effect transistor chip for connection to a microstrip transmission line comprising: a semiconductor substrate having first and second generally opposed surfaces; a field effect transistor formed in said semiconductor substrate including a gate, a source, and a drain, all accessible from said first surface; opposed drain and gate electrodes of substantially the same width respectively electrically connected to said drain and gate and disposed on said first surface; a source electrode electrically connected to said source disposed partially on said first surface and forming an air bridge so that said source electrode crosses over and is electrically insulated from said gate electrode; and a gate beam lead and a drain beam lead respectively electrically connected to said gate and drain electrodes, each beam lead including an extension extending beyond said semiconductor substrate for connection to microstrip transmission line conductors wherein said gate and drain beam leads each have widths transverse to the extension of said gate and drain beams leads beyond said substrate and the widths of said gate electrode and said gate beam electrode, and of said drain electrode and said drain beam electrode, are substantially equal, respectively.

Claim 3

The field effect transistor chip of claim 1 wherein said gate electrode includes a plurality of electrically conducting fingers electrically connected to said gate on said first surface.

Claim 4

The field effect transistor chip of claim 2 wherein said air bridge includes portions of said source electrode spaced from each of said electrically conductive fingers and contacting said first surface between said fingers.

Claim 5

The field effect transistor chip of claim 1 wherein said source electrode is in electrical contact with said second surface through a metallized via extending through said substrate from said first surface to said second surface.

Claim 6

A microstrip transmission line and field effect transistor chip assembly comprising: a microstrip transmission line including first and second dielectric substrates on which are disposed first and second electrical conductors, respectively, each having a substantially uniform width, said first and second substrates being spaced apart by an intervening gap; a semiconductor substrate having first and second generally opposed surfaces, said semiconductor substrate being disposed in the gap between said first and second dielectric substrates; a field effect transistor formed in said semiconductor substrate including a gate, a source, and a drain, all accessible from said first surface; opposed drain and gate electrodes of substantially the same width respectively electrically connected to said drain and gate and disposed at least partially on said first surface; a source electrode electrically connected to said source disposed at least partially on said first surface and forming an air bridge so that said source electrode crosses and is electrically insulated from said gate electrode; and a gate beam lead and a drain beam lead respectively electrically connected to said gate and drain electrodes, each beam lead including an extension extending beyond said semiconductor substrate between and electrically connecting said gate and drain electrodes to said first and second conductors, respectively wherein said gate and drain beam leads each have widths transverse to the extension of said gate and drain beam leads beyond said substrate and the widths of said gate electrode, said gate beam electrode, said drain electrode, said drain beam electrode, and said first and second electrical conductors are substantially equal.

Claim 7

A microstrip transmission line and field effect transistor chip assembly comprising: a microstrip transmission line including first and second dielectric substrates on which are disposed first and second electrical conductors, respectively, each having a substantially uniform width, said first and second substrates being spaced apart by an intervening gap; a semiconductor substrate having first and second generally opposed surfaces, said semiconductor substrate being disposed in the gap between said first and second dielectric substrates; a field effect transistor formed in said semiconductor substrate including a gate, a source, and a drain, all accessible from said first surface; opposed drain and gate electrodes of substantially the same width respectively electrically connected to said drain and gate and disposed at least partially on said first surface; a source electrode electrically connected to said source disposed at least partially on said first surface and forming an air bridge so that said source electrode crosses and is electrically insulated from said gate electrode; and a gate beam lead and a drain beam lead respectively electrically connected to said gate and drain electrodes, each beam lead including an extension extending beyond said semiconductor substrate between and electrically connecting said gate and drain electrodes to said first and second conductors, respectively wherein said gate and drain beam leads each have widths transverse to the extension of said gate and drain beam leads beyond said substrate and the widths of said gate electrode, said gate beam electrode, said drain electrode, said drain beam electrode, and said first and second electrical conductors are substantially equal.

Claim 8

The assembly of claim 5 wherein said air bridges includes a portion of said gate electrode spaced from said first surface and said source electrode by an air gap, said source electrode being disposed on said first surface.

Claim 9

The assembly of claim 6 wherein said gate electrode includes a plurality of electrically conducting fingers extending from the portion of said gate electrode spaced from said first surface to and electrically connected to said gate at said first surface.

Claim 10

The assembly of claim 5 wherein said air bridge includes a portion of said source electrode spaced from said first surface and said gate electrode by an air gap, said gate electrode being disposed on said first surface.

Claim 11

The assembly of claim 8 wherein said gate electrode includes a plurality of electrically conducting fingers electrically connected to said gate on said first surface.

Claim 12

The assembly of claim 9 wherein said air bridge includes portions of said source electrode spaced from each of said electrically conductive fingers and contacting said first surface between said fingers.

Claim 13

The assembly of claim 5 wherein said source electrode is in electrical contact with said second surface through a metallized via extending through said substrate from said first surface to said second surface.

Claim 14

The assembly of claim 5 wherein said gate and drain beam leads are unitary portions of said gate and drain electrodes extending to said first and second conductors.