Semiconductor device with functional portions having different operating voltages on one semiconductor substrate

Claim 2

A semiconductor device comprising: a semiconductor substrate of a first conductivity type having a main surface; a first semiconductor region of a second conductivity type which is opposite to that of said semiconductor substrate formed on the main surface of said semiconductor substrate in which at least a semiconductor element is to be formed; and a second semiconductor region of the second conductivity type formed on the main surface of said semiconductor substrate in which at least one semiconductor element is formed; wherein the at least one semiconductor element in the second semiconductor region includes an impurity region constituting an electrode thereof; and wherein the junction depth of only that portion of said second semiconductor region which is below said impurity region constituting an electrode is deeper than the junction depth of said first semiconductor region.

Claim 3

A semiconductor device according to claim 1 wherein said first semiconductor region contains at least one logic device and said second semiconductor region contains at least one driver device.

Claim 4

A semiconductor device according to claim 2, including an output connection from said second semiconductor region to a load.

Claim 5

A semiconductor device according to claim 3 wherein said load is a fluorescent display.

Claim 6

A semiconductor device according to claim 2, wherein said first and second semiconductor regions are adjacent each other in said substrate.

Claim 7

A semiconductor device according to claim 2, wherein said first and second semiconductor regions are spaced apart from each other by a third semiconductor region in said substrate.

Claim 8

A semiconductor device according to claim 2, including means for applying a first operational voltage to said first semiconductor region and for applying a second operational voltage greater than said first operational voltage to said second semiconductor region.

Claim 9

A semiconductor device according to claim 2, wherein the depth of said portion of said second semiconductor region is greater than that of said first semiconductor region by approximately 1.5 micrometers.

Claim 10

A semiconductor device according to claim 1, further comprising: a first field effect type semiconductor element formed in said first semiconductor region; and a second field effect type semiconductor element formed in said second semiconductor region.

Claim 11

A semiconductor device according to claim 9, wherein operational voltage of said second field effect type semiconductor element is higher than that of said first field effect type semiconductor element.

Claim 12

A semiconductor device according to claim 10, wherein said first field effect type semiconductor element comprises an impurity region of the first conductivity type formed in said first semiconductor region, and said second field effect type semiconductor element comprises an impurity region of the first conductivity type formed in said second semiconductor region.

Claim 13

A semiconductor device according to claim 11, wherein each of said first and second field effect type semiconductor elements, comprises an insulated gate, one electrode and an other electrode formed below said insulated gate spaced apart from each other on the main surface of said semiconductor substrate, said impurity region of the first conductivity type constituting said one electrode and said the other electrode, a channel region being formed in each of said first and second semiconductor regions of the second conductivity type between said one electrode and said the other electrode.

Claim 14

A semiconductor device comprising: a semiconductor substrate of a first conductivity type having a main surface; a first semiconductor region of a second conductivity type which is opposite to that of said semiconductor substrate formed on the main surface of said semiconductor substrate in which at least a first field effect type semiconductor element is formed, said first field effect type semiconductor element including an impurity region of the first conductivity type formed in said semiconductor region; and a second semiconductor region of the second conductivity type formed on the main surface of said semiconductor substrate in which at least a second field effect type semiconductor element is formed, said second field effect type semiconductor element including an impurity region of the first conductivity type formed in said second semiconductor region; wherein operational voltage of said second field effect type semiconductor element is higher than that of said first field effect type semiconductor element; each of said first and second field effect type semiconductor elements comprises an insulated gate, one electrode and an other electrode formed below said insulated gate spaced apart from each other on the main surface of said semiconductor substrate, said impurity region of the first conductivity type constituting said one electrode and said other electrode, a channel region being formed in each of said first and second semiconductor regions of the second conductivity type between said one electrode and said other electrode; and the junction depth of a portion of said second semiconductor region is deeper than the junction depth of said first semiconductor region below only said impurity region of the first conductivity type constituting said one electrode of said second field effect type semiconductor element.

Claim 15

A semiconductor device comprising: a semiconductor substrate of a first conductivity type having a main surface; a first semiconductor region of a second conductivity type which is opposite to that of said semiconductor substrate formed on the main surface of said semiconductor substrate in which at least a first field effect type semiconductor element is formed, said first field effect type semiconductor element including an impurity region of the first conductivity type formed in said semiconductor region; and a second semiconductor region of the second conductivity type formed on the main surface of said semiconductor substrate in which at least a second field effect type semiconductor element is formed, said second field effect type semiconductor element including an impurity region of the first conductivity type formed in said second semiconductor region; wherein operational voltage of said second field effect type semiconductor element is higher than that of said first field effect type semiconductor element; each of said first and second field effect type semiconductor elements comprises an insulated gate, one electrode and an other electrode formed below said insulated gate spaced apart from each other on the main surface of said semiconductor substrate, said impurity region of the first conductivity type constituting said one electrode and said other electrode, a channel region being formed in each of said first and second semiconductor regions of the second conductivity type between said one electrode and said other electrode; and the junction depth of a portion of said second semiconductor region is deeper than the junction depth of said first semiconductor region below only said impurity region of the first conductivity type constituting said one electrode of said second field effect type semiconductor element.

Claim 16

A semiconductor device according to claim 13, further comprising a thick insulating film formed at least on the side of said one electrode below the gate of said second field effect type semiconductor element.

Claim 17

A semiconductor device according to claim 14, further comprising an impurity region of the first conductivity type formed below said thick insulating film.

Claim 18

A semiconductor device according to claim 9, wherein said first semiconductor region constitutes a portion of a semiconductor region in which a complementary field effect type semiconductor element is formed.

Claim 19

A semiconductor device according to claim 16, wherein said semiconductor device comprises a semiconductor region in which a bipolar type semiconductor element is formed.

Claim 20

A semiconductor device according to claim 1, wherein said first semiconductor region and said second semiconductor region are formed adjacent to each other, said device further comprising an insulating film for isolation formed on the main surface of said semiconductor substrate at a border between said first semiconductor region and said second semiconductor region.

Claim 21

A large scale integrated circuit, comprising: a semiconductor substrate of a first conductivity type; a first well region of a second conductivity type which is opposite that of said first conductivity type, formed in said semiconductor substrate; a least one logic device adapted to be operated by a first operating voltage being formed in said first well region; a second well region of a second conductivity type different from said first well region and formed in said substrate; at least one driver device adapted to be operated by a second operating voltage being formed in said second well region, said driver device including an electrode; and an output connection for connecting said at least one driver device to an external load device; wherein only that portion of said second well region below said electrode has a depth in said substrate greater than that of said first well region.

Claim 22

A large scale integrated circuit, comprising: a semiconductor substrate of a first conductivity type; a first well region of a second conductivity type which is opposite that of said first conductivity type, formed in said semiconductor substrate; a least one logic device adapted to be operated by a first operating voltage being formed in said first well region; a second well region of a second conductivity type different from said first well region and formed in said substrate; at least one driver device adapted to be operated by a second operating voltage being formed in said second well region, said driver device including an electrode; and an output connection for connecting said at least one driver device to an external load device; wherein only that portion of said second well region below said electrode has a depth in said substrate greater than that of said first well region.