US5060034A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Memory device using thin film transistors having an insulation film with si/n composition ratio of 0.85 to 1.1
Assignee: Casio Computer Co Ltd
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Filing: 1989-10-25
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Granted: 1991-10-22
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Expires: 2009-10-25
Abstract
Abstract A memory device includes a memory element composed of a first thin film transistor having a memory function, and a select element composed of a second thin film transistor for selecting the memory element. A gate insulation film of the first thin film transistor has a charge storage function. A gate insulation film of the second thin film transistor does not have any charge storage function. If a plurality of the memory devices are arranged in matrix form, this configuration can be used as E 2 PROM. By forming the first and second thin film transistors simultaneously, it is possible to form the first and second thin film transistors easily in the simple manufacturing steps.
Inventors
- 👤 Hideaki Shimizu
- 👤 Nobuyuki Yamamura
- 👤 Hiroyasu Yamada
- 👤 Haruo Wakai
- 👤 Hiroshi Matsumoto
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-28 09:54
CPC Classifications
H; H10; H10B; H10B69/00; H10D; H10D30/00; H10D30/60; H10D30/67; H10D30/6704; H10D30/6729; H10D30/673; H10D30/6733; H10D30/6757
Claims Analysis
Total Claims: 12
Claim 1
Independent Claim
181 words
A memory device comprising: a memory thin film transistor; and a select thin film transistor, coupled to the memory thin film transistor for selecting an operation of the memory thin film transistor; said memory thin film transistor including: a semiconductor layer, source and drain electrodes electrically connected to said semiconductor layer, a gate electrode for controlling formation of a channel of said semiconductor layer, and first insulating film means for insulating said gate electrode and said semiconductor layer from each other, said first insulating film means comprising a silicon nitride film whose Si/N composition ratio is 0.85 to 1.1; and said select thin film transistor including; a semiconductor layer, source and drain electrodes electrically connected to said semiconductor layer of said select thin film transistor, a gate electrode for controlling formation of said semiconductor layer of the select thin film transistor, and second insulating film means for insulating said gate electrode and said semiconductor layer of the select thin film transistor from each other, said second insulating film means comprising a silicon nitride film whose Si/N composition ratio is about 0.75.
Claim 2
Dependent Claim
181 words
A memory device comprising: a memory thin film transistor; and a select thin film transistor, coupled to the memory thin film transistor for selecting an operation of the memory thin film transistor; said memory thin film transistor including: a semiconductor layer, source and drain electrodes electrically connected to said semiconductor layer, a gate electrode for controlling formation of a channel of said semiconductor layer, and first insulating film means for insulating said gate electrode and said semiconductor layer from each other, said first insulating film means comprising a silicon nitride film whose Si/N composition ratio is 0.85 to 1.1; and said select thin film transistor including; a semiconductor layer, source and drain electrodes electrically connected to said semiconductor layer of said select thin film transistor, a gate electrode for controlling formation of said semiconductor layer of the select thin film transistor, and second insulating film means for insulating said gate electrode and said semiconductor layer of the select thin film transistor from each other, said second insulating film means comprising a silicon nitride film whose Si/N composition ratio is about 0.75.
Claim 3
Dependent Claim
22 words
The memory device according to claim 1, wherein said select thin film transistor is directly connected to said memory thin film transistor.
Claim 4
Dependent Claim
37 words
The memory device according to claim 1, wherein said first insulating film means includes a first insulating film and said second insulating film means includes a second insulating film which is thicker than the first insulating film.
Claim 5
Dependent Claim
21 words
The memory device according to claim 3, wherein: said first and second insulating film means each include a common insulating film.
Claim 6
Dependent Claim
27 words
The memory device according to claim 3, wherein said first and second insulating film means each include a film which is formed of a high dielectric material.
Claim 7
Dependent Claim
188 words
A memory device comprising: a memory thin film transistor; and a select thin film transistor, coupled to the memory thin film transistor for selecting an operation of the memory thin film transistor; said memory thin film transistor including: a semiconductor layer, source and drain electrodes electrically connected to said semiconductor layer, a gate electrode for controlling formation of a channel of said semiconductor layer, and first insulating film means directly coupled to said semiconductor layer for insulating said gate electrode and said semiconductor layer from each other, said first insulating film means including silicon nitride film whose Si/N composition ratio is 0.85 to 1.1 and means for trapping charges; and said select thin film transistor including; a semiconductor layer, source and drain electrodes electrically connected to said semiconductor layer of select thin film transistor, a gate electrode for controlling formation of a channel of said semiconductor layer of said select thin film transistor, and second insulating film means for insulating said gate electrode and said semiconductor layer of said select thin film transistor from each other, said second insulating film means having no means for effectively trapping charges.
Claim 8
Dependent Claim
188 words
A memory device comprising: a memory thin film transistor; and a select thin film transistor, coupled to the memory thin film transistor for selecting an operation of the memory thin film transistor; said memory thin film transistor including: a semiconductor layer, source and drain electrodes electrically connected to said semiconductor layer, a gate electrode for controlling formation of a channel of said semiconductor layer, and first insulating film means directly coupled to said semiconductor layer for insulating said gate electrode and said semiconductor layer from each other, said first insulating film means including silicon nitride film whose Si/N composition ratio is 0.85 to 1.1 and means for trapping charges; and said select thin film transistor including; a semiconductor layer, source and drain electrodes electrically connected to said semiconductor layer of select thin film transistor, a gate electrode for controlling formation of a channel of said semiconductor layer of said select thin film transistor, and second insulating film means for insulating said gate electrode and said semiconductor layer of said select thin film transistor from each other, said second insulating film means having no means for effectively trapping charges.
Claim 9
Dependent Claim
225 words
A memory device including: a memory thin film transistor; and a select thin film transistor, coupled to said memory thin film transistor for selecting an operation of the memory thin film transistor; said memory thin film transistor: a semiconductor layer, source and drain electrodes electrically connected to said semiconductor layer, a gate electrode for controlling formation of a channel said semiconductor layer, and first insulating film means directly coupled to said semiconductor layer for insulating said gate electrode and said semiconductor layer from each other, and said select thin film transistor including; a semiconductor layer, source and drain electrodes electrically connected to said semiconductor layer of said select thin film transistor, a gate electrode for controlling formation of a channel of said semiconductor layer of said select thin film transistor, and second insulating film means directly coupled to said semiconductor layer for insulating said gate electrode and said semiconductor layer of said select thin film transistor from each other, and wherein said first and second insulating film means each comprise a silicon nitride film whose Si/N composition ratio is 0.85 to 1.1; said silicon nitride film of said memory thin film transistor is used as it is; and said silicon nitride film of said select thin film transistor includes a redundant film other than silicon nitride film whose Si/N composition ratio is 0.85 to 1.1.
Claim 10
Dependent Claim
225 words
A memory device including: a memory thin film transistor; and a select thin film transistor, coupled to said memory thin film transistor for selecting an operation of the memory thin film transistor; said memory thin film transistor: a semiconductor layer, source and drain electrodes electrically connected to said semiconductor layer, a gate electrode for controlling formation of a channel said semiconductor layer, and first insulating film means directly coupled to said semiconductor layer for insulating said gate electrode and said semiconductor layer from each other, and said select thin film transistor including; a semiconductor layer, source and drain electrodes electrically connected to said semiconductor layer of said select thin film transistor, a gate electrode for controlling formation of a channel of said semiconductor layer of said select thin film transistor, and second insulating film means directly coupled to said semiconductor layer for insulating said gate electrode and said semiconductor layer of said select thin film transistor from each other, and wherein said first and second insulating film means each comprise a silicon nitride film whose Si/N composition ratio is 0.85 to 1.1; said silicon nitride film of said memory thin film transistor is used as it is; and said silicon nitride film of said select thin film transistor includes a redundant film other than silicon nitride film whose Si/N composition ratio is 0.85 to 1.1.
Claim 11
Dependent Claim
225 words
A memory device including: a memory thin film transistor; and a select thin film transistor, coupled to said memory thin film transistor for selecting an operation of said memory thin film transistor; said memory thin film transistor including; a semiconductor layer, source and drain electrodes electrically connected to said semiconductor layer, a gate electrode for controlling formation of a channel of said semiconductor layer; and first insulating film means directly coupled to said semiconductor layer for insulating said gate electrode and said semiconductor layer from each other, and said select thin film transistor including; a semiconductor layer, source and drain electrodes electrically connected to said semiconductor layer of said select thin film transistor; a gate electrode for controlling formation of a channel of said semiconductor layer of said select thin film transistor; and second insulating film means directly coupled to said semiconductor layer for insulating said gate electrode and said semiconductor layer of said select thin film transistor from each other; and wherein said first and second insulating film means each comprise a silicon nitride film whose Si/N composition ratio is about 0.75; said silicon nitride film of said select thin film transistor is used as it is; and a portion of said silicon nitride film of said memory thin film transistor is Si ion-doped so that an Si/N composition ratio is 0.85 to 1.1.
Claim 12
Dependent Claim
225 words
A memory device including: a memory thin film transistor; and a select thin film transistor, coupled to said memory thin film transistor for selecting an operation of said memory thin film transistor; said memory thin film transistor including; a semiconductor layer, source and drain electrodes electrically connected to said semiconductor layer, a gate electrode for controlling formation of a channel of said semiconductor layer; and first insulating film means directly coupled to said semiconductor layer for insulating said gate electrode and said semiconductor layer from each other, and said select thin film transistor including; a semiconductor layer, source and drain electrodes electrically connected to said semiconductor layer of said select thin film transistor; a gate electrode for controlling formation of a channel of said semiconductor layer of said select thin film transistor; and second insulating film means directly coupled to said semiconductor layer for insulating said gate electrode and said semiconductor layer of said select thin film transistor from each other; and wherein said first and second insulating film means each comprise a silicon nitride film whose Si/N composition ratio is about 0.75; said silicon nitride film of said select thin film transistor is used as it is; and a portion of said silicon nitride film of said memory thin film transistor is Si ion-doped so that an Si/N composition ratio is 0.85 to 1.1.
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