US5060239A — Transfer strobe time delay selector and method fo…

Claim 1

Independent Claim 441 words

A transfer strobe delay stage selector for insuring the accurate transfer of data between a high speed data stream associated with high speed circuitry and a low speed parallel data stream associated with low speed circuitry comprising: (A) means for periodically inserting a synchronization channel comprising N + 1 bits of data of a predetermined bit pattern into the high speed steam of data, where N is a positive integer; (B) means for converting the high speed stream of data and periodic synchronization channel into words of parallel data, each word of parallel data containing N + 1 bits; (C) means for generating a periodic latch signal having a repetition rate equal to the high speed bit transfer rate divided by N + 1; (D) a delay stage module for receipt of the latch signal, the delay stage module comprising a plurality of delay stages, each stage having a time delay between its input and its output, each stage having a selectable output, and each stage, except the last stage, connected as an input to the next stage; (E) means for selecting any one of the delay stage outputs of the delay stage module so as to generate a transfer strobe signal having a repetition rate the same as the latch signal, but time delayed equal to the sum of the time delays of the selected delay stage plus all the preceding delay stages; (F) a synchronization channel identification module for receipt of the parallel data generated by the means for converting the high-speed stream of data and operable so as to perform an identification process upon receipt of the transfer strobe signal, the synchronization identification module having means for generating an "in sync" signal on an output when a word of parallel data periodically matches a predetermined parallel data bit pattern; wherein the periodic matching occurs at the same rate as the periodicity of the synchronization channel, thereby effectively determining the proper detection of the periodic synchronization channel; and (G) a delay stage control module connected to said output of the synchronization channel identification module for causing the delay stage selecting means to change the delay stage selected when an "in-sync" signal is not received by the delay stage control module, and wherein modification of the selected delay stage is halted when an "in-sync" signal is received; whereby the transfer strobe signal is adjusted with respect to its time delay as compared to the latch signal until the synchronization channel identification module accurately detects the synchronization channel contained within the high-speed data stream, thereby insuring the accurate transferral of data between the high speed circuitry and the low speed circuitry.

Claim 2

Dependent Claim 441 words

A transfer strobe delay stage selector for insuring the accurate transfer of data between a high speed data stream associated with high speed circuitry and a low speed parallel data stream associated with low speed circuitry comprising: (A) means for periodically inserting a synchronization channel comprising N + 1 bits of data of a predetermined bit pattern into the high speed steam of data, where N is a positive integer; (B) means for converting the high speed stream of data and periodic synchronization channel into words of parallel data, each word of parallel data containing N + 1 bits; (C) means for generating a periodic latch signal having a repetition rate equal to the high speed bit transfer rate divided by N + 1; (D) a delay stage module for receipt of the latch signal, the delay stage module comprising a plurality of delay stages, each stage having a time delay between its input and its output, each stage having a selectable output, and each stage, except the last stage, connected as an input to the next stage; (E) means for selecting any one of the delay stage outputs of the delay stage module so as to generate a transfer strobe signal having a repetition rate the same as the latch signal, but time delayed equal to the sum of the time delays of the selected delay stage plus all the preceding delay stages; (F) a synchronization channel identification module for receipt of the parallel data generated by the means for converting the high-speed stream of data and operable so as to perform an identification process upon receipt of the transfer strobe signal, the synchronization identification module having means for generating an "in sync" signal on an output when a word of parallel data periodically matches a predetermined parallel data bit pattern; wherein the periodic matching occurs at the same rate as the periodicity of the synchronization channel, thereby effectively determining the proper detection of the periodic synchronization channel; and (G) a delay stage control module connected to said output of the synchronization channel identification module for causing the delay stage selecting means to change the delay stage selected when an "in-sync" signal is not received by the delay stage control module, and wherein modification of the selected delay stage is halted when an "in-sync" signal is received; whereby the transfer strobe signal is adjusted with respect to its time delay as compared to the latch signal until the synchronization channel identification module accurately detects the synchronization channel contained within the high-speed data stream, thereby insuring the accurate transferral of data between the high speed circuitry and the low speed circuitry.

Claim 3

Dependent Claim 19 words

A transfer strobe delay stage selector as defined in claim 1, wherein each delay stage comprises a non-inverting buffer.

Claim 4

Dependent Claim 62 words

A transfer strobe delay stage selector as defined in claim 2, wherein the delay stage control module has means to generate an advance signal or a retard signal for transfer to the delay stage selecting means so as to cause a delay stage, either after or before the previously selected delay stage, to be selected when the synchronization channel is not detected.

Claim 5

Dependent Claim 62 words

A transfer strobe delay stage selector as defined in claim 1, wherein the delay stage control module has means to generate an advance signal or a retard signal for transfer to the delay stage selecting means so as to cause a delay stage, either after or before the previously selected delay stage, to be selected when the synchronization channel is not detected.

Claim 6

Dependent Claim 221 words

A transfer strobe delay stage selector as defined in claim 1, further comprising; (H) a second, auxiliary, means for independently selecting any one of the time delay stage outputs of the delay stage module so as to generate an auxiliary transfer strobe signal; (I) a second, auxiliary, synchronization channel identification module for receipt of the parallel data generated by the serial to parallel converting means and operable so as to perform an identification process upon receipt of the auxiliary transfer strobe signal, the auxiliary synchronization identification module having means for generating an "in sync" signal on an output when a word of parallel data periodically matches a predetermined parallel data bit pattern; wherein the periodic matching occurs at the same rate as the periodicity of the synchronization channel, thereby effectively determining the proper detection of the periodic synchronization channel; (J) a second, auxiliary, delay stage control module connected to the output of the second synchronization channel identification module for causing the auxiliary delay stage selecting means to determine an optimal delay stage for synchronization channel detection; and (K) means for dynamically adjusting the selected delay stage of the delay stage selecting means associated with the transfer strobe once synchronization channel detection has occurred if the selected delay stag varies from the selected auxiliary delay stage by more than a predetermined amount.

Claim 7

Dependent Claim 66 words

A transfer strobe delay stage selector as defined in claim 5, wherein the second, auxiliary, delay stage control module varies the delay stage selected so as to determine when a particular delay stage results in non-detection of the synchronization channel and thereby determines the range of delay stages over which synchronization channel detection occurs so as to determine the optimal delay stage for synchronization channel detection

Claim 8

Dependent Claim 82 words

A transfer strobe delay stage selector as defined in claim 6, wherein the delay stage control module has means for generating a first signal for advancing and a second signal for retarding the time delay of the transfer strobe, and further wherein the delay stage selecting means comprises a delay stage select control module for receipt of the first and second signals so as to generate a delay stage select signal therefrom for selecting the delay stage output for the transfer strobe.

Claim 9

Dependent Claim 90 words

A transfer strobe delay stage selector as defined in claim 7, wherein the second delay stage control module has means for generating a first auxiliary signal for advancing and a second auxiliary signal for retarding the time delay of the auxiliary transfer strobe, and further wherein the second delay stage selecting means comprises a delay stage select control module for receipt of the first and second auxiliary signals so as to generate an auxiliary delay stage select signal therefrom for selecting the delay stage output for the auxiliary transfer strobe.

Claim 10

Dependent Claim 62 words

A transfer strobe delay stage selector as defined in claim 8, wherein the means for selecting the delay stage outputs and the second auxiliary means for selecting the delay stage outputs are implemented by a dual multiplexor receiving the delay stage select signal and the auxiliary delay stage select signal so as to select the transfer strobe and auxiliary transfer strobes respectively.

Claim 11

Dependent Claim 82 words

A transfer strobe delay stage selector as defined in claim 1, wherein the delay stage control module has means for generating a first signal for advancing and a second signal for retarding the time delay of the transfer strobe, and further wherein the delay stage selecting means comprises a delay stage select control module for receipt of the first and second signals so as to generate a delay stage select signal therefrom for selecting the delay stage output for the transfer strobe.

Claim 12

Dependent Claim 30 words

A transfer strobe delay stage selector as defined in claim 1, wherein the synchronization channel identification module and the delay stage control module are part of the lower speed circuitry.

Claim 13

Independent Claim 182 words

A method of transferring data between a high speed data stream associated with high speed circuitry and low speed circuitry by use of a parallel data stream comprising the steps of: (1) periodically inserting a synchronization channel comprising N + 1 bits of data of a predetermined bit pattern into the high speed stream of data, where N is a positive integer; (2) converting the high speed stream of data and the periodic synchronization channel into words of parallel data, each word of parallel data containing N + 1 bits; (3) generating a periodic latch signal having a repetition rate equal to the high speed bit transfer rate divided by N + 1; (4) selectively delaying the latch signal so as to generate a transfer strobe signal therefrom; (5) receiving the parallel data and determining, under control of the transfer strobe signal, when the synchronization channel is detected; (6) when the synchronization channel is not detected, reselecting the latch signal delay so as to alter the time delay of the transfer strobe; and (7) repeating steps 4-6 until synchronization channel detection occurs.

Claim 14

Independent Claim 182 words

A method of transferring data between a high speed data stream associated with high speed circuitry and low speed circuitry by use of a parallel data stream comprising the steps of: (1) periodically inserting a synchronization channel comprising N + 1 bits of data of a predetermined bit pattern into the high speed stream of data, where N is a positive integer; (2) converting the high speed stream of data and the periodic synchronization channel into words of parallel data, each word of parallel data containing N + 1 bits; (3) generating a periodic latch signal having a repetition rate equal to the high speed bit transfer rate divided by N + 1; (4) selectively delaying the latch signal so as to generate a transfer strobe signal therefrom; (5) receiving the parallel data and determining, under control of the transfer strobe signal, when the synchronization channel is detected; (6) when the synchronization channel is not detected, reselecting the latch signal delay so as to alter the time delay of the transfer strobe; and (7) repeating steps 4-6 until synchronization channel detection occurs.

Claim 15

Dependent Claim 36 words

A method of transferring data as defined in claim 12, wherein the selective delaying of the latch signal so as to generate a transfer strobe signal is performed in discrete intervals of selectable delay time intervals.

Claim 16

Dependent Claim 62 words

A method of transferring data as defined in claim 13, wherein the adjusting of the transfer strobe time delay channel detection occurs by increasing the time delay until synchronization channel detection occurs or until a maximum time delay is reached, and in the latter event, changing the time delay to a minimum value and increasing this value until synchronization channel detection occurs.

Claim 17

Dependent Claim 162 words

A method of transferring data as defined in claim 12, further comprising the steps of; (8) independently selecting a time delay of the generated latch signal so as to generate an auxiliary transfer strobe signal; (9) receiving the parallel data and determining, under control of the auxiliary transfer strobe signal, the detection of the synchronization channel; (10) adjusting the selected time delay associated with the auxiliary transfer strobe signal until synchronization channel detection occurs; (11) dynamically determining the optimal auxiliary transfer strobe time delay; and (12) comparing the optimal auxiliary transfer strobe time delay with the transfer strobe time delay and when the transfer strobe time delay varies therefrom by more than a predetermined amount, modifying the transfer strobe time delay so as to correspond with the auxiliary transfer strobe time delay; thereby preventing loss of synchronization channel detection under control of the primary strobe even when variations in the propagation delay between the high speed and the low speed circuitry occurs.

Claim 18

Dependent Claim 378 words

A transfer strobe delay stage selector for insuring the accurate transfer of data between a high speed data stream associated with high speed circuitry and a low speed parallel data stream associated with low speed circuitry, wherein the data stream includes a periodic synchronization channel comprising a plurality of bits of a predetermined pattern, comprising; (A) means for converting the high speed stream of data and periodic synchronization channel into words of parallel data; (B) means for generating a periodic latch signal; (C) a delay stage module for receipt of the latch signal, the delay stage module comprising a plurality of delay stages, each stage having a time delay between its input and its output, each stage having a selectable output, and each stage, except the last stage, connected as an input to the next stage; (D) means for selecting any one of the delay stage outputs of the delay stage module so as to generate a transfer strobe signal having a repetition rate the same as the latch signal, but time delayed equal to the sum of the time delays of the selected delay stage plus all the preceding delay stages; (E) a synchronization channel identification module for performing an identification process upon receipt of the transfer strobe signal, the synchronization identification module having means for generating an "in sync" signal on an output when a word of parallel data periodically matches a predetermined parallel data bit pattern; wherein the periodic matching occurs at the same rate as the periodicity of the synchronization channel, thereby effectively determining the proper detection of the periodic synchronization channel; and (F) a delay stage control module connected to said output of the synchronization channel identification module for causing the delay stage selecting means to change the delay stage selected when an "in-sync" signal is not received by the delay stage control module, and wherein modification of the selected delay stage is halted when an "in-sync" signal is received; whereby the transfer strobe signal is adjusted with respect to its time delay as compared to the latch signal until the synchronization channel identification module accurately detects the synchronization channel contained within the high-speed data stream, thereby insuring the accurate transferral of data between the high speed circuitry and the low speed circuitry.

Claim 19

Dependent Claim 378 words

A transfer strobe delay stage selector for insuring the accurate transfer of data between a high speed data stream associated with high speed circuitry and a low speed parallel data stream associated with low speed circuitry, wherein the data stream includes a periodic synchronization channel comprising a plurality of bits of a predetermined pattern, comprising; (A) means for converting the high speed stream of data and periodic synchronization channel into words of parallel data; (B) means for generating a periodic latch signal; (C) a delay stage module for receipt of the latch signal, the delay stage module comprising a plurality of delay stages, each stage having a time delay between its input and its output, each stage having a selectable output, and each stage, except the last stage, connected as an input to the next stage; (D) means for selecting any one of the delay stage outputs of the delay stage module so as to generate a transfer strobe signal having a repetition rate the same as the latch signal, but time delayed equal to the sum of the time delays of the selected delay stage plus all the preceding delay stages; (E) a synchronization channel identification module for performing an identification process upon receipt of the transfer strobe signal, the synchronization identification module having means for generating an "in sync" signal on an output when a word of parallel data periodically matches a predetermined parallel data bit pattern; wherein the periodic matching occurs at the same rate as the periodicity of the synchronization channel, thereby effectively determining the proper detection of the periodic synchronization channel; and (F) a delay stage control module connected to said output of the synchronization channel identification module for causing the delay stage selecting means to change the delay stage selected when an "in-sync" signal is not received by the delay stage control module, and wherein modification of the selected delay stage is halted when an "in-sync" signal is received; whereby the transfer strobe signal is adjusted with respect to its time delay as compared to the latch signal until the synchronization channel identification module accurately detects the synchronization channel contained within the high-speed data stream, thereby insuring the accurate transferral of data between the high speed circuitry and the low speed circuitry.

Claim 20

Dependent Claim 19 words

A transfer strobe delay stage selector as defined in claim 16, wherein each delay stage comprises a non-inverting buffer.

Claim 21

Dependent Claim 62 words

A transfer strobe delay stage selector as defined in claim 17, wherein the delay stage control module has means to generate an advance signal or a retard signal for transfer to the delay stage selecting means so as to cause a delay stage, either after or before the previously selected delay stage, to be selected when the synchronization channel is not detected.

Claim 22

Dependent Claim 62 words

A transfer strobe delay stage selector as defined in claim 16, wherein the delay stage control module has means to generate an advance signal or a retard signal for transfer to the delay stage selecting means so as to cause a delay stage, either after or before the previously selected delay stage, to be selected when the synchronization channel is not detected.

Claim 23

Dependent Claim 203 words

A transfer strobe delay stage selector as defined in claim 16, further comprising; (G) a second, auxiliary, means for independently selecting any one of the time delay stage outputs of the delay stage module so as to generate an auxiliary transfer strobe signal; (H) a second, auxiliary, synchronization channel identification module for performing an identification process upon receipt of the auxiliary transfer strobe signal, the auxiliary synchronization identification module having means for generating an "in sync" signal on an output when a word of parallel data periodically matches a predetermined parallel data bit pattern; wherein the periodic matching occurs at the same rate as the periodicity of the synchronization channel, thereby effectively determining the proper detection of the periodic synchronization channel; (I) a second, auxiliary, delay stage control module connected to the output of the second synchronization channel identification module for causing the auxiliary delay stage selecting means to determine an optimal delay stage for synchronization channel detection; and (J) means for dynamically adjusting the selected delay stage of the delay stage selecting means associated with the transfer strobe once synchronization channel detection has occurred when the selected delay stage varies from the selected auxiliary delay stage by more than a predetermined amount.

Claim 24

Dependent Claim 66 words

A transfer strobe delay stage selector as defined in claim 20, wherein the second, auxiliary, delay stage control module varies the delay stage selected so as to determine when a particular delay stage results in non-detection of the synchronization channel and thereby determines the range of delay stages over which synchronization channel detection occurs so as to determine the optimal delay stage for synchronization channel detection.

Claim 25

Dependent Claim 82 words

A transfer strobe delay stage selector as defined in claim 21, wherein the delay stage control module has means for generating a first signal for advancing and a second signal for retarding the time delay of the transfer strobe, and further wherein the delay stage selecting means comprises a delay stage select control module for receipt of the first and second signals so as to generate a delay stage select signal therefrom for selecting the delay stage output for the transfer strobe.

Claim 26

Dependent Claim 90 words

A transfer strobe delay stage selector as defined in claim 22, wherein the second delay stage control module has means for generating a first auxiliary signal for advancing and a second auxiliary signal for retarding the time delay of the auxiliary transfer strobe, and further wherein the second delay stage selecting means comprises a delay stage select control module for receipt of the first and second auxiliary signals so as to generate an auxiliary delay stage select signal therefrom for selecting the delay stage output for the auxiliary transfer strobe.

Claim 27

Dependent Claim 62 words

A transfer strobe delay stage selector as defined in claim 23, wherein the means for selecting the delay stage outputs and the second auxiliary means for selecting the delay stage outputs are implemented by a dual multiplexor receiving the delay stage select signal and the auxiliary delay stage select signal so as to select the transfer strobe and auxiliary transfer strobes respectively.

Claim 28

Dependent Claim 82 words

A transfer strobe delay stage selector as defined in claim 16, wherein the delay stage control module has means for generating a first signal for advancing and a second signal for retarding the time delay of the transfer strobe, and further wherein the delay stage selecting means comprises a delay stage select control module for receipt of the first and second signals so as to generate a delay stage select signal therefrom for selecting the delay stage output for the transfer strobe.

Claim 29

Dependent Claim 30 words

A transfer strobe delay stage selector as defined in claim 16, wherein the synchronization channel identification module and the delay stage control module are part of the lower speed circuitry.

Claim 30

Independent Claim 178 words

A method of transferring data between a high speed data stream associated with high speed circuitry and low speed circuitry by use of a parallel data stream, the high speed data stream including a periodic synchronization channel comprising a plurality of sequential bits of a predetermined pattern, wherein the method comprises the steps of: (1) the high speed circuitry converting the high speed stream of data and the periodic synchronization channel into words of parallel data; (2) the high speed circuitry generating a periodic latch signal; (3) the high speed circuitry selectively delaying the latch signal so as to generate a transfer strobe signal therefrom; (4) the low speed circuitry receiving the words of parallel data and determining, under control of the transfer strobe signal, when the synchronization channel is detected; (5) when the synchronization channel is not detected, the low speed circuitry causing the high speed circuitry to change the selective delay of the latch signal so as to alter the time delay of the transfer strobe; and (6) repeating steps 3-5 unit synchronization channel detection occurs.

Claim 31

Independent Claim 178 words

A method of transferring data between a high speed data stream associated with high speed circuitry and low speed circuitry by use of a parallel data stream, the high speed data stream including a periodic synchronization channel comprising a plurality of sequential bits of a predetermined pattern, wherein the method comprises the steps of: (1) the high speed circuitry converting the high speed stream of data and the periodic synchronization channel into words of parallel data; (2) the high speed circuitry generating a periodic latch signal; (3) the high speed circuitry selectively delaying the latch signal so as to generate a transfer strobe signal therefrom; (4) the low speed circuitry receiving the words of parallel data and determining, under control of the transfer strobe signal, when the synchronization channel is detected; (5) when the synchronization channel is not detected, the low speed circuitry causing the high speed circuitry to change the selective delay of the latch signal so as to alter the time delay of the transfer strobe; and (6) repeating steps 3-5 unit synchronization channel detection occurs.

Claim 32

Dependent Claim 36 words

A method of transferring data as defined in claim 27, wherein the selective delaying of the latch signal so a to generate a transfer strobe signal is performed in discrete intervals of selectable delay time intervals.

Claim 33

Dependent Claim 62 words

A method of transferring data as defined in claim 28, wherein the adjusting of the transfer strobe time delay channel detection occurs by increasing the time delay until synchronization channel detection occurs or until a maximum time delay is reached, and in the latter event, changing the time delay to a minimum value and increasing this value until synchronization channel detection occurs.

Claim 34

Dependent Claim 157 words

A method of transferring data as defined in claim 27, further comprising the steps of; (7) independently selecting a time delay of the generated latch signal so as to generate an auxiliary transfer strobe signal; (8) determining, under control of the auxiliary transfer strobe signal, the detection of the synchronization channel; (9) adjusting the selected time delay associated with the auxiliary transfer strobe signal until synchronization channel detection occurs; (10) dynamically determining the optimal auxiliary transfer strobe time delay; and (11) comparing the optimal auxiliary transfer strobe time delay with the transfer strobe time delay and when the transfer strobe time delay varies therefrom by more than a predetermined amount, modifying the transfer strobe time delay so as to correspond with the auxiliary transfer strobe time delay; thereby preventing loss of synchronization channel detection under control of the primary strobe even when variations in the propagation delay between the high speed and the low speed circuitry occurs.

Annuity Stage	Window Opens	Payment Deadline	Surcharge Period Until	Estimated Fee	Status
3.5 Years (Year 4)	1994-10-21	1995-04-22	1995-10-22	$2000.00	Window Closed / Lapsed
7.5 Years (Year 8)	1998-10-21	1999-04-22	1999-10-22	$3760.00	Window Closed / Lapsed
11.5 Years (Year 12)	2002-10-21	2003-04-22	2003-10-22	$7700.00	Window Closed / Lapsed

Transfer strobe time delay selector and method for performing same

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