Tournament data system with game score communication between remote player terminal and central computer

Claim 2

A tournament system comprising: (a) a plurality of games for automatically generating score signals, (b) a central computer linked to said games for automatically polling and receiving said score signals achieved on said games by players in a tournament, (c) means for storing handicap values relating to players of said games at said central computer, (d) means at said games for transmitting player identification signals to said computer, (e) means for modifying scores achieved on said games at the central computer by the handicap value associated with the player playing the games to produce a resultant score, and (f) means for automatically downloading from said central computer a winning score modified by the handicap value for display at said games.

Claim 3

A tournament system comprising: (a) a plurality of games of different kinds for automatically generating score signals as the games are played and for automatically transmitting said signals, (b) a central computer linked to said games for automatically receiving said score signals achieved on said games by players in a tournament, (c) means for storing a handicap value relating to the kind of game at either the games or the central computer, (d) means for determining scores achieved on said games modified by the handicap value associated with each of said games and automatically establishing a winner of the tournament based on said modified scores.

Claim 4

A tournament system comprising: (a) a plurality of games of different kinds for automatically generating score signals as the games are played and for automatically transmitting said signals, (b) a central computer linked to said games for automatically receiving said score signals achieved on said games by players in a tournament, (c) means for storing a handicap value relating to the kind of game at either the games or the central computer, (d) means for determining scores achieved on said games modified by the handicap value associated with each of said games and automatically establishing a winner of the tournament based on said modified scores.

Claim 5

A tournament system as defined in claim 2 including means for storing a handicap value relating to players of said games at said central computer, and means at said games for transmitting a player identification signal to said computer, whereby scores achieved on said different kinds of games can be modified by the handicap values associated with the games as well as the handicap values associated with the identified players to determine resultant scores.

Claim 6

A tournament system as defined in claim 1, 2 or 3 in which the scores from said games are automatically received by said central computer by means of a local area data network.

Claim 7

A tournament system comprising: (a) an electronic game for automatically generating score data signals as the game is played, (b) first memory means for storing at least said score data signals relating to scores achieved on the game, at predetermining memory locations thereof, (c) a data link connected to the memory means for communication with a central computer, (d) means for automatically reading the score data stored at the predetermined memory locations, (e) overlay memory means connected to the game for storing signals indicative of the memory locations of said scores, and interface processor means for accessing said stored signals indicative of the memory locations of said scores for generating address signals for reading said first memory means storing said score data signals, (f) means for receiving a polling signal from a central computer, and (g) means for automatically applying the score data to the data link for transmission to the central computer, for automatically comparing scores at the central computer and determining a tournament winner, upon polling by said central computer.

Claim 8

A tournament system comprising: (a) an electronic game for automatically generating score data signals as the game is played, (b) first memory means for storing at least said score data signals relating to scores achieved on the game, at predetermining memory locations thereof, (c) a data link connected to the memory means for communication with a central computer, (d) means for automatically reading the score data stored at the predetermined memory locations, (e) overlay memory means connected to the game for storing signals indicative of the memory locations of said scores, and interface processor means for accessing said stored signals indicative of the memory locations of said scores for generating address signals for reading said first memory means storing said score data signals, (f) means for receiving a polling signal from a central computer, and (g) means for automatically applying the score data to the data link for transmission to the central computer, for automatically comparing scores at the central computer and determining a tournament winner, upon polling by said central computer.

Claim 9

A tournament system as defined in claim 5 in which said game includes a game memory for storing score signals, and in which said first memory means is connected to said game for storing said score data signals in parallel with said game memory, and means for addressing said first memory means for storing said score data by means of said address signals.

Claim 10

A tournament system as defined in claim 6 whereby the electronic game generates signals indicative of the end of a game, further including means for detecting the end of a game signals and for causing the address signals to be generated and the stored score signals read.

Claim 11

A tournament system as defined in claim 7 in which the means for detecting is comprised of a comparator for comparing data signals generated by the game with a predetermined signal indicative of the end of a game.

Claim 12

A tournament system as defined in claim 8, the game including an address bus and a data bus connected to an address port and a data port respectively of the game memory, and in which the means for storing the score data signals is comprised of a memory having its address port connectable to the address bus of the game and its data bus connectable to the data bus of the game, whereby the means for storing the score data signals is enabled to store signals stored by the game memory in parallel therewith.

Claim 13

A tournament as defined in claim 9 including an interface processor address bus to which the overlay memory is connected, means for switching the address input of the means for storing the score data signals to the interface processor address bus for receiving address signals generated under control of said processor means.

Claim 14

A tournament system as defined in claim 10 including an interface processor data bus, means for switching the data input of the means for storing the score data signals to the interface processor data bus for receiving auxiliary game control data signals under control of the processor means for storage at address locations received via the interface processor address bus.

Claim 15

A tournament system as defined in claim 11 including means for receiving said auxiliary game control data signals from said central computer.

Claim 16

A tournament system as defined in claim 11 or 12 including means for switching said data and address ports to the data and address buses of said game for transmitting said auxiliary game control data to the data bus for operation of said game under address control of address signals generated under control of the interface processor means and appearing on the interface processor address bus.

Claim 17

A tournament system as defined in claim 11 or 12 in which display data is comprised of control signals for a different game alternate to that in said electronic game, including means for switching said data and address ports to the data and address buses of said game for transmitting said control data to the data bus for control of said game, whereby a player of said game is enabled to play said different game.

Claim 18

A tournament system as defined in claim 7 or 9 further including a player code identification means for reading a player identification code applied thereto, means for transmitting a code signal related to said player code to the central computer for verification thereof, means for receiving a verification code signal from the central computer and for generating and applying a "game start" pulse to the game upon receipt of the verification code signal whereby play of the game is initiated.

Claim 19

A tournament system as defined in claim 7 or 9 further including a magnetic card reader for reading a card containing a magnetically encoded player code thereon, means for transmitting a code signal relating thereto to the central computer for verification thereof, means for receiving a verification code signal from the central computer and for generating and applying a "game start" pulse to the game upon receipt of the verification code whereby play of the game is initiated.

Claim 20

An electronic tournament system comprising: (a) a plurality of electronic games of different types each including a display, a game data bus, a game address bus, a game memory for storing score data appearing on the data bus at addresses specified by data appearing on the address bus and game processor means for controlling a game in which it is included, (b) an interface circuit associated with each game comprising: (i) interface memory means having address and data ports, (ii) an interface address bus connected between the address ports and the game address bus, (iii) an interface data bus connected between the data port and the game data bus, whereby data stored in the game memory is similarly stored in the interface memory means, iv) a communication port, (v) means for automatically reading the data stored in the interface memory means to obtain score data and for transmitting the score data to the communication port, (vi) a central processor for controlling said interface circuit, (c) a central computer including means for communication with the interface circuits via the communication port, for transmitting polling signals to the interface circuits and thereby initiating said transmission of score data for reception by the central computer, the central computer further including means for storage of player identification codes and associated game credits, and for generating and transmitting a player code verification signal to a selected electronic game in the event of reception of a code from said selected electronic game which matches a stored player identification code and the existence of a game credit associated therewith, each interface circuit further including (vii) a player identification code reader, (viii) means for transmitting a player identification code read by the code reader to the central computer, (ix) means for receiving a player code verification signal from the central computer and generating a game start signal, and for transmitting the game start signal to the associated electronic game whereby a player plays a score signal generating game on the electronic game, (d) means for storage of handicap data associated with one, either or both of player codes and individual associated electronic games, and for selecting a winning game and player based on a predetermined relationship between the game scores and handicaps.

Claim 21

An electronic tournament system comprising: (a) a plurality of electronic games of different types each including a display, a game data bus, a game address bus, a game memory for storing score data appearing on the data bus at addresses specified by data appearing on the address bus and game processor means for controlling a game in which it is included, (b) an interface circuit associated with each game comprising: (i) interface memory means having address and data ports, (ii) an interface address bus connected between the address ports and the game address bus, (iii) an interface data bus connected between the data port and the game data bus, whereby data stored in the game memory is similarly stored in the interface memory means, iv) a communication port, (v) means for automatically reading the data stored in the interface memory means to obtain score data and for transmitting the score data to the communication port, (vi) a central processor for controlling said interface circuit, (c) a central computer including means for communication with the interface circuits via the communication port, for transmitting polling signals to the interface circuits and thereby initiating said transmission of score data for reception by the central computer, the central computer further including means for storage of player identification codes and associated game credits, and for generating and transmitting a player code verification signal to a selected electronic game in the event of reception of a code from said selected electronic game which matches a stored player identification code and the existence of a game credit associated therewith, each interface circuit further including (vii) a player identification code reader, (viii) means for transmitting a player identification code read by the code reader to the central computer, (ix) means for receiving a player code verification signal from the central computer and generating a game start signal, and for transmitting the game start signal to the associated electronic game whereby a player plays a score signal generating game on the electronic game, (d) means for storage of handicap data associated with one, either or both of player codes and individual associated electronic games, and for selecting a winning game and player based on a predetermined relationship between the game scores and handicaps.

Claim 22

An electronic tournament system comprising: (a) a plurality of electronic games of different types each including a display, a game data bus, a game address bus, a game memory for storing score data appearing on the data bus at addresses specified by data appearing on the address bus and game processor means for controlling a game in which it is included, (b) an interface circuit associated with each game comprising: (i) interface memory means having address and data ports, (ii) an interface address bus connected between the address ports and the game address bus, (iii) an interface data bus connected between the data port and the game data bus, whereby data stored in the game memory is similarly stored in the interface memory means, (iv) a communication port, (v) means for automatically reading the data stored in the interface memory means to obtain score data and for transmitting the score data to the communication port, (vi) a central processor for controlling said interface circuit, (c) a central computer including means for communication with the interface circuits via the communication port, for transmitting polling signals to the interface circuits and thereby initiating said transmission of score data for reception by the central computer, (d) each interface circuit further including an overlay memory for storage of pointer signals relating to score addresses of the interface memory means where score data for the associated electronic game are stored, means for reading the overlay memory and for converting the pointer signals to said score address signals, means for switching the address port of the interface memory means to receive said score address signals, and means for switching the data port of the interface memory means whereby the score data stored therein may be read for transmission to the central computer.

Claim 23

An electronic tournament system comprising: (a) a plurality of electronic games of different types each including a display, a game data bus, a game address bus, a game memory for storing score data appearing on the data bus at addresses specified by data appearing on the address bus and game processor means for controlling a game in which it is included, (b) an interface circuit associated with each game comprising: (i) interface memory means having address and data ports, (ii) an interface address bus connected between the address ports and the game address bus, (iii) an interface data bus connected between the data port and the game data bus, whereby data stored in the game memory is similarly stored in the interface memory means, (iv) a communication port, (v) means for automatically reading the data stored in the interface memory means to obtain score data and for transmitting the score data to the communication port, (vi) a central processor for controlling said interface circuit, (c) a central computer including means for communication with the interface circuits via the communication port, for transmitting polling signals to the interface circuits and thereby initiating said transmission of score data for reception by the central computer, (d) each interface circuit further including an overlay memory for storage of pointer signals relating to score addresses of the interface memory means where score data for the associated electronic game are stored, means for reading the overlay memory and for converting the pointer signals to said score address signals, means for switching the address port of the interface memory means to receive said score address signals, and means for switching the data port of the interface memory means whereby the score data stored therein may be read for transmission to the central computer.

Claim 24

An electronic tournament system comprising: (a) a plurality of electronic games of different types each including a display, a game data bus, a game address bus, a game memory for storing score data appearing on the data bus at addresses specified by data appearing on the address bus and game processor means for controlling a game in which it is included, (b) an interface circuit associated with each game comprising: (i) interface memory means having address and data ports, (ii) an interface address bus connected between the address ports and the game address bus, (iii) an interface data bus connected between the data port and the game data bus, whereby data stored in the game memory is similarly stored in the interface memory means, (iv) a communication port, (v) means for automatically reading the data stored in the interface memory means to obtain score data and for transmitting the score data to the communication port, (vi) a central processor for controlling said interface circuit, (c) a central computer including means for communication with the interface circuits via the communication port, for transmitting polling signals to the interface circuits and thereby initiating said transmission of score data for reception by the central computer, (d) each interface circuit each further including an overlay memory for storage of pointer signals relating to score addresses of the interface memory means where score data for the associated electronic game are stored, means for reading the overlay memory and for converting the pointer signals to said score address signals, means for switching the address port of the interface memory means to receive said score address signals, comparator means connected to the interface data bus for detecting an "end of game" signal generated by the associated electronic game appearing on its data bus, and in response for signalling the central computer that a game has ended, whereby a data signal is transmitted to said central computer indicative thereof.

Claim 25

An electronic tournament system comprising: (a) a plurality of electronic games of different types each including a display, a game data bus, a game address bus, a game memory for storing score data appearing on the data bus at addresses specified by data appearing on the address bus and game processor means for controlling a game in which it is included, (b) an interface circuit associated with each game comprising: (i) interface memory means having address and data ports, (ii) an interface address bus connected between the address ports and the game address bus, (iii) an interface data bus connected between the data port and the game data bus, whereby data stored in the game memory is similarly stored in the interface memory means, (iv) a communication port, (v) means for automatically reading the data stored in the interface memory means to obtain score data and for transmitting the score data to the communication port, (vi) a central processor for controlling said interface circuit, (c) a central computer including means for communication with the interface circuits via the communication port, for transmitting polling signals to the interface circuits and thereby initiating said transmission of score data for reception by the central computer, (d) each interface circuit each further including an overlay memory for storage of pointer signals relating to score addresses of the interface memory means where score data for the associated electronic game are stored, means for reading the overlay memory and for converting the pointer signals to said score address signals, means for switching the address port of the interface memory means to receive said score address signals, comparator means connected to the interface data bus for detecting an "end of game" signal generated by the associated electronic game appearing on its data bus, and in response for signalling the central computer that a game has ended, whereby a data signal is transmitted to said central computer indicative thereof.

Claim 26

An electronic tournament system comprising: (a) a plurality of electronic games of different types each including a display, a game data bus, a game address bus, a game memory for storing score data appearing on the data bus at addresses specified by data appearing on the address bus and game processor means for controlling a game in which it is included, (b) an interface circuit associated with each game comprising: (i) interface memory means having address and data ports, (ii) an interface address bus connected between the address ports and the game address bus, (iii) an interface data bus connected between the data port and the game data bus, whereby data stored in the game memory is similarly stored in the interface memory means, (iv) a communication port, (v) means for automatically reading the data stored in the interface memory means to obtain score data and for transmitting the score data to the communication port, (vi) a central processor for controlling said interface circuit, (c) a central computer including means for communication with the interface circuits via the communication port, for transmitting polling signals to the interface circuit and thereby initiating said transmission of score data for reception by the central computer, (d) each interface circuit further including an overlay memory for storage of pointer signals relating to score addresses of the interface memory means where score data for the associated electronic game are stored, means for reading the overlay memory and for converting the pointer signals to said score address signals, means for switching the address port of the interface memory means to receive said score address signals, comparator means connected to the interface data bus for detecting signals representative of an end of a game generated by the associated electronic game appearing on its data bus, and in response for signalling the central computer that a game has ended, whereby a data signal is transmitted to said central computer indicative thereof, means for switching the address and data ports to receive address and data signals for storage of the latter data signals in the interface memory means at addresses specified by the latter address signals, means for storage of said latter address and data signals, and means for switching the interface memory means data port to the game data bus to output said data signals thereon and thereby control operation of the electronic game.

Claim 27

An electronic tournament system comprising: (a) a plurality of electronic games of different types each including a display, a game data bus, a game address bus, a game memory for storing score data appearing on the data bus at addresses specified by data appearing on the address bus and game processor means for controlling a game in which it is included, (b) an interface circuit associated with each game comprising: (i) interface memory means having address and data ports, (ii) an interface address bus connected between the address ports and the game address bus, (iii) an interface data bus connected between the data port and the game data bus, whereby data stored in the game memory is similarly stored in the interface memory means, (iv) a communication port, (v) means for automatically reading the data stored in the interface memory means to obtain score data and for transmitting the score data to the communication port, (vi) a central processor for controlling said interface circuit, (c) a central computer including means for communication with the interface circuits via the communication port, for transmitting polling signals to the interface circuit and thereby initiating said transmission of score data for reception by the central computer, (d) each interface circuit further including an overlay memory for storage of pointer signals relating to score addresses of the interface memory means where score data for the associated electronic game are stored, means for reading the overlay memory and for converting the pointer signals to said score address signals, means for switching the address port of the interface memory means to receive said score address signals, comparator means connected to the interface data bus for detecting signals representative of an end of a game generated by the associated electronic game appearing on its data bus, and in response for signalling the central computer that a game has ended, whereby a data signal is transmitted to said central computer indicative thereof, means for switching the address and data ports to receive address and data signals for storage of the latter data signals in the interface memory means at addresses specified by the latter address signals, means for storage of said latter address and data signals, and means for switching the interface memory means data port to the game data bus to output said data signals thereon and thereby control operation of the electronic game.

Claim 28

An electronic tournament system comprising: (a) a plurality of electronic games of different types each including a display, a game data bus, a game address bus, a game memory for storing score data appearing on the data bus at addresses specified by data appearing on the address bus and game processor means for controlling a game in which it is included, (b) an interface circuit associated with each game comprising: (i) interface memory means having address and data ports, (ii) an interface address bus connected between the address ports and the game address bus, (iii) an interface data bus connected between the data port and the game data bus, whereby data stored in the game memory is similarly stored in the interface memory means, (iv) a communication port, (v) means for automatically reading the data stored in the interface memory means to obtain score data and for transmitting the score data to the communication port, (vi) a central processor for controlling said interface circuit, (c) a central computer including means for communication with the interface circuits via the communication port, for transmitting polling signals to the interface circuit and thereby initiating said transmission of score data for reception by the central computer, (d) each interface circuit further including an overlay memory for storage of pointer signals relating to score addresses of the interface memory means where score data for the associated electronic game are stored, means for reading the overlay memory and for converting the pointer signals to said score address signals, means for switching the address port of the interface memory means to receive said score address signals, comparator means connected to the interface data bus for detecting signals representative of an end of a game, generated by the associated electronic game appearing on its data bus, and in response for signalling the central processor that a game has ended, whereby a data signal is transmitted to said central computer indicative thereof, means for switching the address and data ports to receive address and data signals for storage of the latter data signals in the interface memory means at addresses specified by the latter address signals, means for receiving at least said latter data signals from the associated central computer, means for storage of said latter address and data signals, and means for switching the interface memory means data port to the game data bus to output said data signals thereon and thereby control operation of the electronic game.

Claim 29

An electronic tournament system comprising: (a) a plurality of electronic games of different types each including a display, a game data bus, a game address bus, a game memory for storing score data appearing on the data bus at addresses specified by data appearing on the address bus and game processor means for controlling a game in which it is included, (b) an interface circuit associated with each game comprising: (i) interface memory means having address and data ports, (ii) an interface address bus connected between the address ports and the game address bus, (iii) an interface data bus connected between the data port and the game data bus, whereby data stored in the game memory is similarly stored in the interface memory means, (iv) a communication port, (v) means for automatically reading the data stored in the interface memory means to obtain score data and for transmitting the score data to the communication port, (vi) a central processor for controlling said interface circuit, (c) a central computer including means for communication with the interface circuits via the communication port, for transmitting polling signals to the interface circuit and thereby initiating said transmission of score data for reception by the central computer, (d) each interface circuit further including an overlay memory for storage of pointer signals relating to score addresses of the interface memory means where score data for the associated electronic game are stored, means for reading the overlay memory and for converting the pointer signals to said score address signals, means for switching the address port of the interface memory means to receive said score address signals, comparator means connected to the interface data bus for detecting signals representative of an end of a game, generated by the associated electronic game appearing on its data bus, and in response for signalling the central processor that a game has ended, whereby a data signal is transmitted to said central computer indicative thereof, means for switching the address and data ports to receive address and data signals for storage of the latter data signals in the interface memory means at addresses specified by the latter address signals, means for receiving at least said latter data signals from the associated central computer, means for storage of said latter address and data signals, and means for switching the interface memory means data port to the game data bus to output said data signals thereon and thereby control operation of the electronic game.

Claim 30

An electronic tournament system comprising: (a) a plurality of central computers, (b) a plurality of games of skill of different types each including means for generating signals representative of scores resulting from said games and for displaying said scores on a display, (c) each game including means for transmitting said score signals to at least one of the central computers upon polling from said at least one central computer, whereby groups of said games are associated with each central computer, said central computers being adapted to determine winning group scores from each group of games of different types, (d) means at each of said games for receiving signals from the central computers associated therewith representative of winning score announcements for display thereof on local displays, (e) one of a plurality of regional computers with which one or a plurality of groups of central computers communicates, means for transmission of winning score data signals from the central computers to the one or plurality of regional computers whereby a winning regional score is computed and corresponding announcement signals transmitted to the central computers for transmission to and display at the games, (f) means at each central computer for storage of player codes and associated game credits, means at each game for reading cards carrying individual player codes, for transmitting a verification inquiry to an associated central computer, for receiving a verification signal from the associated central computer and in response for initiating operation of said game, and (g) means at each central computer for storing handicap data associated with each stored player code, and for determining said winning scores based on a predetermined combination of scores achieved on the initiated games with said handicap data.

Claim 31

An electronic tournament system comprising: (a) a plurality of central computers, (b) a plurality of games of skill of different types each including means for generating signals representative of scores resulting from said games and for displaying said scores on a display, (c) each game including means for transmitting said score signals to at least one of the central computers upon polling from said at least one central computer, whereby groups of said games are associated with each central computer, said central computers being adapted to determine winning group scores from each group of games of different types, (d) means at each of said games for receiving signals from the central computers associated therewith representative of winning score announcements for display thereof on local displays, (e) one of a plurality of regional computers with which one or a plurality of groups of central computers communicates, means for transmission of winning score data signals from the central computers to the one or plurality of regional computers whereby a winning regional score is computed and corresponding announcement signals transmitted to the central computers for transmission to and display at the games, (f) means at each central computer for storage of player codes and associated game credits, means at each game for reading cards carrying individual player codes, for transmitting a verification inquiry to an associated central computer, for receiving a verification signal from the associated central computer and in response for initiating operation of said game, and (g) means at each central computer for storing handicap data associated with each stored player code, and for determining said winning scores based on a predetermined combination of scores achieved on the initiated games with said handicap data.

Claim 32

A tournament system comprising: an electronic game for automatically generating score signals as the game is played, memory means for storing at least said score data signals relating to scores achieved on the game, at predetermined memory locations of said game, a data link connected to the memory means for communication with a central computer, means for automatically reading the score data stored at the predetermined memory locations, means for automatically applying the score data to the data link for transmission to the central computer, for automatically comparing scores and determining a tournament winner, upon polling by said central computer, overlay memory means connected to the game for storing signals indicative of the memory locations of said scores, and interface processor means for accessing said stored signals indicative of the memory locations of said scores for generating address signals for reading a memory storing said score data signals, means for storing said score data signals in parallel with said memory, means for addressing the latter means for storing said score data by means of said address signals, the electronic game generating signals indicative of the end of a game, further including means for detecting the end of a game signals and for causing the address signals to be generated and the stored score signals read, the means for detecting being comprised of a comparator for comparing data signals generated by the game with a predetermined signal indicative of the end of a game, the game including an address bus and a data bus connected to an address port and a data port respectively of the memory, and in which the means for storing the score data signals is comprised of a memory having its address port connectable to the address bus of the game and its data bus connectable to the data bus of the game, whereby the means for storing the score data signals is enabled to store signals stored by the memory in parallel therewith, an interface processor address bus to which the overlay memory is connected, means for switching the address input of the means for storing the score data signals to the interface processor address bus for receiving address signals generated under control of said processor means, an interface processor data bus, means for switching the data input of he means for storing the score data signals to the interface processor data bus for receiving auxiliary game control data signals under control of the processor means for storage at address locations received via the interface processor address bus, and means for switching said data ports to the data bus of said game for transmitting said signals representative of winning score announcements to the data bus for display at said game under address control of address signals generated under control of the interface processor from data signals received from the central computer.

Claim 33

A tournament system comprising: an electronic game for automatically generating score signals as the game is played, memory means for storing at least said score data signals relating to scores achieved on the game, at predetermined memory locations of said game, a data link connected to the memory means for communication with a central computer, means for automatically reading the score data stored at the predetermined memory locations, means for automatically applying the score data to the data link for transmission to the central computer, for automatically comparing scores and determining a tournament winner, upon polling by said central computer, overlay memory means connected to the game for storing signals indicative of the memory locations of said scores, and interface processor means for accessing said stored signals indicative of the memory locations of said scores for generating address signals for reading a memory storing said score data signals, means for storing said score data signals in parallel with said memory, means for addressing the latter means for storing said score data by means of said address signals, the electronic game generating signals indicative of the end of a game, further including means for detecting the end of a game signals and for causing the address signals to be generated and the stored score signals read, the means for detecting being comprised of a comparator for comparing data signals generated by the game with a predetermined signal indicative of the end of a game, the game including an address bus and a data bus connected to an address port and a data port respectively of the memory, and in which the means for storing the score data signals is comprised of a memory having its address port connectable to the address bus of the game and its data bus connectable to the data bus of the game, whereby the means for storing the score data signals is enabled to store signals stored by the memory in parallel therewith, an interface processor address bus to which the overlay memory is connected, means for switching the address input of the means for storing the score data signals to the interface processor address bus for receiving address signals generated under control of said processor means, an interface processor data bus, means for switching the data input of he means for storing the score data signals to the interface processor data bus for receiving auxiliary game control data signals under control of the processor means for storage at address locations received via the interface processor address bus, and means for switching said data ports to the data bus of said game for transmitting said signals representative of winning score announcements to the data bus for display at said game under address control of address signals generated under control of the interface processor from data signals received from the central computer.

Claim 34

A tournament system as defined in claim 23 including means for receiving said auxiliary game control data signals from said central computer.

Claim 35

A tournament system comprising: (a) an electronic game for automatically generating score signals as the game is played, (b) means for applying the score signals to a data link port for transmission to a central computer in response to automatic polling from said central computer, (c) a keyboard means, processor means for causing operation of a different play and different display on the display of said game upon operation of the keyboard means by said player.

Claim 36

A tournament system comprising: (a) an electronic game for automatically generating score signals as the game is played, (b) means for applying the score signals to a data link port for transmission to a central computer in response to automatic polling from said central computer, (c) a keyboard means, processor means for causing operation of a different play and different display on the display of said game upon operation of the keyboard means by said player.

Claim 37

A tournament system comprising: (a) an electronic game for automatically generating score signals as the game is played, (b) means for applying the score signals to a data link port for transmission to a central computer in response to automatic polling from said central computer, (c) a keyboard means, processor means for causing operation of a different play and different display on the display of said game upon operation of the keyboard means by said player, and means for receiving a player verification signal via the data link port for enabling the game upon receipt of said verification signal.

Claim 38

A tournament system comprising: (a) an electronic game for automatically generating score signals as the game is played, (b) means for applying the score signals to a data link port for transmission to a central computer in response to automatic polling from said central computer, (c) a keyboard means, processor means for causing operation of a different play and different display on the display of said game upon operation of the keyboard means by said player, and means for receiving a player verification signal via the data link port for enabling the game upon receipt of said verification signal.

Claim 39

A tournament system comprising: an electronic game for automatically generating score signals as the game is played, memory means for storing at least said score data signals relating to scores achieved on the game, at predetermined memory locations of said game, a data link port connected to the memory means for communication with a central computer, means for automatically reading the score data stored at the predetermined memory locations, means for automatically applying the score data to the data link for transmission to the central computer, for automatically comparing scores and determining a tournament winner, upon polling by said central computer, overlay memory means connected to the game for storing signals indicative of the memory locations of said scores, and interface processor means for accessing said stored signals indicative of the memory locations of said scores for generating address signals for reading a memory storing said score data signals, means for storing said score data signals in parallel with said memory, means for addressing the latter means for storing said score data by means of said address signals, the electronic game generating signals indicative of the end of a game, further including means for detecting the end of a game signals and for causing the address signals to be generated and the stored score signals read, the means for detecting being comprised of a comparator for comparing data signals generated by the game with a predetermined signal indicative of the end of a game, the game including an address bus and a data bus connected to an address port and a data port respectively of the memory, and in which the means for storing the score data signals is comprised of a memory having its address port connectable to the address bus of the game and its data bus connectable to the data bus of the game, whereby the means for storing the score data signals is enabled to store signals stored by the memory in parallel therewith, an interface processor address bus to which the overlay memory is connected, means for switching the address input of the means for storing the score data signals to the interface processor address bus for receiving address signals generated under control of said processor means, an interface processor data bus, means for switching the data input of the means for storing the score data signals to the interface processor data bus for receiving auxiliary game control data signals under control of the processor means for storage at address locations received via the interface processor address bus, and a first random access memory for storing first display operation signals, a multiplexer, means for applying the first display operation signals to one input port of the multiplexer, means for applying game display operation signals from the game to a second input port of the multiplexer, a processor for enabling the multiplexer to apply either the first display operation signals or the game display operation signals to video display operation circuitry of said game.

Claim 40

A tournament system comprising: an electronic game for automatically generating score signals as the game is played, memory means for storing at least said score data signals relating to scores achieved on the game, at predetermined memory locations of said game, a data link port connected to the memory means for communication with a central computer, means for automatically reading the score data stored at the predetermined memory locations, means for automatically applying the score data to the data link for transmission to the central computer, for automatically comparing scores and determining a tournament winner, upon polling by said central computer, overlay memory means connected to the game for storing signals indicative of the memory locations of said scores, and interface processor means for accessing said stored signals indicative of the memory locations of said scores for generating address signals for reading a memory storing said score data signals, means for storing said score data signals in parallel with said memory, means for addressing the latter means for storing said score data by means of said address signals, the electronic game generating signals indicative of the end of a game, further including means for detecting the end of a game signals and for causing the address signals to be generated and the stored score signals read, the means for detecting being comprised of a comparator for comparing data signals generated by the game with a predetermined signal indicative of the end of a game, the game including an address bus and a data bus connected to an address port and a data port respectively of the memory, and in which the means for storing the score data signals is comprised of a memory having its address port connectable to the address bus of the game and its data bus connectable to the data bus of the game, whereby the means for storing the score data signals is enabled to store signals stored by the memory in parallel therewith, an interface processor address bus to which the overlay memory is connected, means for switching the address input of the means for storing the score data signals to the interface processor address bus for receiving address signals generated under control of said processor means, an interface processor data bus, means for switching the data input of the means for storing the score data signals to the interface processor data bus for receiving auxiliary game control data signals under control of the processor means for storage at address locations received via the interface processor address bus, and a first random access memory for storing first display operation signals, a multiplexer, means for applying the first display operation signals to one input port of the multiplexer, means for applying game display operation signals from the game to a second input port of the multiplexer, a processor for enabling the multiplexer to apply either the first display operation signals or the game display operation signals to video display operation circuitry of said game.

Claim 41

A tournament system comprising: an electronic game for automatically generating score signals as the game is played, memory means for storing at least said score data signals relating to scores achieved on the game, at predetermined memory locations of said game, a data link port connected to the memory means for communication with a central computer, means for automatically reading the score data stored at the predetermined memory locations, means for automatically applying the score data to the data link for transmission to the central computer, for automatically comparing scores and determining a tournament winner, upon polling by said central computer, overlay memory means connected to the game for storing signals indicative of the memory locations of said scores, and interface processor means for accessing said stored signals indicative of the memory locations of said scores for generating address signals for reading a memory storing said score data signals, means for storing said score data signals in parallel with said memory, means for addressing the latter means for storing said score data by means of said address signals, the electronic game generating signals indicative of the end of a game, further including means for detecting the end of a game signals and for causing the address signals to be generated and the stored score signals read, the means for detecting being comprised of a comparator for comparing data signals generated by the game with a predetermined signals indicative of the end of a game, the game including an address bus and a data bus connected to an address port and a data port respectively of the memory, and in which the means for storing the score data signals is comprised of a memory having its address port connectable to the address bus of the game and its data bus connectable to the data bus of the game, whereby the means for storing the score data signals is enabled to store signals stored by the memory in parallel therewith, an interface processor address bus to which the overlay memory is connected, means for switching the address input of the means for storing the score data signals to the interface processor address bus for receiving address signals generated under control of said processor means, an interface processor data bus, means for switching the data input of the means for storing the score data signals to the interface processor data bus for receiving auxiliary game control data signals under control of the processor means for storage at address locations received via the interface processor address bus, and a random access memory connected to the game for storing score and auxiliary game control signals, a keyboard, a first random access memory for storing first display operation signals, a multiplexer, means for applying the first display operation signals to one input port of the multiplexer, means for applying game display operation signals from the game to a second input port of the multiplexer, a processor for enabling the multiplexer to apply either the first display operation signals or the game display operation signals to video display operation circuitry of said game, and for enabling operation of an auxiliary game in place of the electronic game upon operation of said keyboard.

Claim 42

A tournament system comprising: an electronic game for automatically generating score signals as the game is played, memory means for storing at least said score data signals relating to scores achieved on the game, at predetermined memory locations of said game, a data link port connected to the memory means for communication with a central computer, means for automatically reading the score data stored at the predetermined memory locations, means for automatically applying the score data to the data link for transmission to the central computer, for automatically comparing scores and determining a tournament winner, upon polling by said central computer, overlay memory means connected to the game for storing signals indicative of the memory locations of said scores, and interface processor means for accessing said stored signals indicative of the memory locations of said scores for generating address signals for reading a memory storing said score data signals, means for storing said score data signals in parallel with said memory, means for addressing the latter means for storing said score data by means of said address signals, the electronic game generating signals indicative of the end of a game, further including means for detecting the end of a game signals and for causing the address signals to be generated and the stored score signals read, the means for detecting being comprised of a comparator for comparing data signals generated by the game with a predetermined signals indicative of the end of a game, the game including an address bus and a data bus connected to an address port and a data port respectively of the memory, and in which the means for storing the score data signals is comprised of a memory having its address port connectable to the address bus of the game and its data bus connectable to the data bus of the game, whereby the means for storing the score data signals is enabled to store signals stored by the memory in parallel therewith, an interface processor address bus to which the overlay memory is connected, means for switching the address input of the means for storing the score data signals to the interface processor address bus for receiving address signals generated under control of said processor means, an interface processor data bus, means for switching the data input of the means for storing the score data signals to the interface processor data bus for receiving auxiliary game control data signals under control of the processor means for storage at address locations received via the interface processor address bus, and a random access memory connected to the game for storing score and auxiliary game control signals, a keyboard, a first random access memory for storing first display operation signals, a multiplexer, means for applying the first display operation signals to one input port of the multiplexer, means for applying game display operation signals from the game to a second input port of the multiplexer, a processor for enabling the multiplexer to apply either the first display operation signals or the game display operation signals to video display operation circuitry of said game, and for enabling operation of an auxiliary game in place of the electronic game upon operation of said keyboard.

Claim 43

A tournament system as defined in one of claims 25-28 further including means for identifying a player and for applying a player identification signal to said data link port for reception by the central computer, verification thereof and generation of a verification signal.

Claim 44

A tournament system comprising: an electronic game for automatically generating score signals as the game is played, memory means for storing at least said score data signals relating to scores achieved on the game, at predetermined memory locations of said game, a data link connected to the memory means for communication with a central computer, means for automatically reading the score data stored at the predetermined memory locations, means for automatically applying the score data to the data link for transmission to the central computer, for automatically comparing scores and determining a tournament winner, upon polling by said central computer, overlay memory means connected to the game for storing signals indicative of the memory locations of said scores, and interface processor means for accessing said stored signals indicative of the memory locations of said scores for generating address signals for reading a memory storing said score data signals, means for storing said score data signals in parallel with said memory, means for addressing the latter means for storing said score data by means of said address signals, the electronic game generating signals indicative of the end of a game, further including means for detecting the end of a game signals and for causing the address signals to be generated and the stored score signals read, the means for detecting being comprised of a comparator for comparing data signals generated by the game with a predetermined signal indicative of the end of a game, the game including an address bus and a data bus connected to an address port and a data port respectively of the memory, and in which the means for storing the score data signals is comprised of a memory having its address port connectable to the address bus of the game and its data bus connectable to the data bus of the game, whereby the means for storing the score data signals is enabled to store signals stored by the memory in parallel therewith, an interface processor address bus to which the overlay memory is connected, means for switching the address input of the means for storing the score data signals to the interface processor address bus for receiving address signals generated under control of said processor means, an interface processor data bus, means for switching the data input of he means for storing the score data signals to the interface processor data bus for receiving auxiliary game control data signals under control of the processor means for storage at address locations received via the interface processor address bus, and a random access memory connected to the game for storing score and auxiliary game control signals, a keyboard, a first random access memory for storing first display operation signals, a multiplexer, means for applying the first display operation signals to one input port of the multiplexer, means for applying game display operation signals from the game to a second input port of the multiplexer, a processor for enabling the multiplexer to apply either the first display operation signals or the game display operation signals to video display operation circuitry of said game, and for enabling operation of an auxiliary game in place of the electronic game upon operation of said keyboard, and means for receiving said auxiliary game control signals and said first display operation signals from said central computer.

Claim 45

A tournament system comprising: an electronic game for automatically generating score signals as the game is played, memory means for storing at least said score data signals relating to scores achieved on the game, at predetermined memory locations of said game, a data link connected to the memory means for communication with a central computer, means for automatically reading the score data stored at the predetermined memory locations, means for automatically applying the score data to the data link for transmission to the central computer, for automatically comparing scores and determining a tournament winner, upon polling by said central computer, overlay memory means connected to the game for storing signals indicative of the memory locations of said scores, and interface processor means for accessing said stored signals indicative of the memory locations of said scores for generating address signals for reading a memory storing said score data signals, means for storing said score data signals in parallel with said memory, means for addressing the latter means for storing said score data by means of said address signals, the electronic game generating signals indicative of the end of a game, further including means for detecting the end of a game signals and for causing the address signals to be generated and the stored score signals read, the means for detecting being comprised of a comparator for comparing data signals generated by the game with a predetermined signal indicative of the end of a game, the game including an address bus and a data bus connected to an address port and a data port respectively of the memory, and in which the means for storing the score data signals is comprised of a memory having its address port connectable to the address bus of the game and its data bus connectable to the data bus of the game, whereby the means for storing the score data signals is enabled to store signals stored by the memory in parallel therewith, an interface processor address bus to which the overlay memory is connected, means for switching the address input of the means for storing the score data signals to the interface processor address bus for receiving address signals generated under control of said processor means, an interface processor data bus, means for switching the data input of he means for storing the score data signals to the interface processor data bus for receiving auxiliary game control data signals under control of the processor means for storage at address locations received via the interface processor address bus, and a random access memory connected to the game for storing score and auxiliary game control signals, a keyboard, a first random access memory for storing first display operation signals, a multiplexer, means for applying the first display operation signals to one input port of the multiplexer, means for applying game display operation signals from the game to a second input port of the multiplexer, a processor for enabling the multiplexer to apply either the first display operation signals or the game display operation signals to video display operation circuitry of said game, and for enabling operation of an auxiliary game in place of the electronic game upon operation of said keyboard, and means for receiving said auxiliary game control signals and said first display operation signals from said central computer.

Claim 46

A tournament system comprising: (a) an electronic game for automatically generating score signals as the game is played, (b) means for applying the score signals to a data link port for transmission to a central computer in response to automatic polling from said central computer, and (c) means for storing alternate game control signals whereby an alternate game can be played generating alternate scores.

Claim 47

A tournament system comprising: (a) an electronic game for automatically generating score signals as the game is played, (b) means for applying the score signals to a data link port for transmission to a central computer in response to automatic polling from said central computer, and (c) means for storing alternate game control signals whereby an alternate game can be played generating alternate scores.

Claim 48

A tournament system as defined in claim 31 including means for enabling said alternate game control signals under control of the central computer.

Claim 49

A tournament system comprising: (a) an electronic game for automatically generating score signals as the game is played, (b) means for applying the score signals to a data link port for transmission to a central computer in response to automatic polling from said central computer, and (c) means for storing alternate control and display signals, means for enabling communication with the central computer under control of the alternate control signals and display of an alternate display on the game display under control of the alternate display signals.

Claim 50

A tournament system comprising: (a) an electronic game for automatically generating score signals as the game is played, (b) means for applying the score signals to a data link port for transmission to a central computer in response to automatic polling from said central computer, and (c) means for storing alternate control and display signals, means for enabling communication with the central computer under control of the alternate control signals and display of an alternate display on the game display under control of the alternate display signals.

Claim 53

A method of operating a tournament as defined in claim 34 including storing credit signals associated with predetermined ones of said player codes at said central computer, and decrementing individual ones of the credit signals with predetermined values upon receiving said signals representative of individual player codes and matching said received player codes and the stored player codes.

Claim 54

An electronic tournament system comprising: (a) a plurality of electronic games of different types each including, a display, a game data bus, a game address bus, a game memory for storing scored data appearing on the data bus at addresses specified by data appearing on the address bus, and game processor means for controlling a game in which it is included, (b) an interface circuit associated with each game comprising: (i) interface memory means having address and data ports, (ii) an interface address bus connected between the address port and the game address bus, (iii) an interface data bus connected between the data port and the game data bus, whereby data stored in the game memory is similarly stored in the interface memory means, (iv) a communication port, (v) means for automatically reading the data stored in the interface memory means to obtain score data and for transmitting the score data to the communication port, (vi) a central processor for controlling said interface circuit, (c) a central computer including means for communication with the interface circuits via the communication port, for transmitting polling signals to the interface circuits and thereby initiating said transmission of score data for reception by the central computer, (d) each interface circuit further including (vii) a player identification code reader, (viii) means for transmitting a player identification code read by the code reader to the central computer, (ix) means for receiving a player code verification signal from the central computer and generating a game start signal, and for transmitting the game start signal to the associated electronic game whereby a player plays a score signal generating game on the electronic game, (x) an overlay memory for storage of pointer signals relating to score addresses of the interface memory means where score data for the associated electronic game are stored, means for reading the overlay memory and for converting the pointer signals to said score address signals, means for switching the address port of the interface memory means for receiving said score address signals, and means for switching the data port of the interface memory means whereby the score data stored therein may be read for transmission to the central computer.

Claim 55

An electronic tournament system comprising: (a) a plurality of electronic games of different types each including, a display, a game data bus, a game address bus, a game memory for storing scored data appearing on the data bus at addresses specified by data appearing on the address bus, and game processor means for controlling a game in which it is included, (b) an interface circuit associated with each game comprising: (i) interface memory means having address and data ports, (ii) an interface address bus connected between the address port and the game address bus, (iii) an interface data bus connected between the data port and the game data bus, whereby data stored in the game memory is similarly stored in the interface memory means, (iv) a communication port, (v) means for automatically reading the data stored in the interface memory means to obtain score data and for transmitting the score data to the communication port, (vi) a central processor for controlling said interface circuit, (c) a central computer including means for communication with the interface circuits via the communication port, for transmitting polling signals to the interface circuits and thereby initiating said transmission of score data for reception by the central computer, (d) each interface circuit further including (vii) a player identification code reader, (viii) means for transmitting a player identification code read by the code reader to the central computer, (ix) means for receiving a player code verification signal from the central computer and generating a game start signal, and for transmitting the game start signal to the associated electronic game whereby a player plays a score signal generating game on the electronic game, (x) an overlay memory for storage of pointer signals relating to score addresses of the interface memory means where score data for the associated electronic game are stored, means for reading the overlay memory and for converting the pointer signals to said score address signals, means for switching the address port of the interface memory means for receiving said score address signals, and means for switching the data port of the interface memory means whereby the score data stored therein may be read for transmission to the central computer.

Claim 56

An electronic tournament system comprising: (a) a plurality of electronic games of different types each including a display, a game data bus, a game address bus, a game memory for storing scored data appearing on the data bus at addresses specified by data appearing on the address bus, and game processor means for controlling a game in which it is included, (b) an interface circuit associated with each game comprising: (i) interface memory means having address and data ports, (ii) an interface address bus connected between the address port and the game address bus, (iii) an interface data bus connected between the data port and the game data bus, whereby data stored in the game memory is similarly stored in the interface memory means, (iv) a communication port, (v) means for automatically reading the data stored in the interface memory means to obtain score data and for transmitting the score data to the communication port, (vi) a central processor for controlling said interface circuit, (c) a central computer including means for communication with the interface circuits via the communication port, for transmitting polling signals to the interface circuits and thereby initiating said transmission of score data for reception by the central computer, each central computer further including means for storage of player identification codes and associated game credits, and for generating and transmitting a player code verification signal to a selected electronic game in the event of reception of a code from said selected electronic game which matches a stored player identification and the existence of a game credit associated therewith, (d) each interface circuit further including (vii) a player identification code reader, (viii) means for transmitting a player identification code read by the code reader to the associated central processor, (ix) means for receiving a player code verification signal from an associated central computer and generating a game start signal, and for transmitting the game start signal to the associated electronic game whereby a player plays a score signal generating game on the electronic game, (x) an overlay memory for storage of pointer signals relating to score addresses of the interface memory means where score data for the associated electronic game are stored, means for reading the overlay memory and for converting the pointer signals to said score address signals, means for reading the overlay memory and for converting the pointer signals to said score address signals, and means for switching the data port of the interface memory means whereby the score data stored therein may be read for transmission to the central computer.

Claim 57

An electronic tournament system comprising: (a) a plurality of electronic games of different types each including a display, a game data bus, a game address bus, a game memory for storing scored data appearing on the data bus at addresses specified by data appearing on the address bus, and game processor means for controlling a game in which it is included, (b) an interface circuit associated with each game comprising: (i) interface memory means having address and data ports, (ii) an interface address bus connected between the address port and the game address bus, (iii) an interface data bus connected between the data port and the game data bus, whereby data stored in the game memory is similarly stored in the interface memory means, (iv) a communication port, (v) means for automatically reading the data stored in the interface memory means to obtain score data and for transmitting the score data to the communication port, (vi) a central processor for controlling said interface circuit, (c) a central computer including means for communication with the interface circuits via the communication port, for transmitting polling signals to the interface circuits and thereby initiating said transmission of score data for reception by the central computer, each central computer further including means for storage of player identification codes and associated game credits, and for generating and transmitting a player code verification signal to a selected electronic game in the event of reception of a code from said selected electronic game which matches a stored player identification and the existence of a game credit associated therewith, (d) each interface circuit further including (vii) a player identification code reader, (viii) means for transmitting a player identification code read by the code reader to the associated central processor, (ix) means for receiving a player code verification signal from an associated central computer and generating a game start signal, and for transmitting the game start signal to the associated electronic game whereby a player plays a score signal generating game on the electronic game, (x) an overlay memory for storage of pointer signals relating to score addresses of the interface memory means where score data for the associated electronic game are stored, means for reading the overlay memory and for converting the pointer signals to said score address signals, means for reading the overlay memory and for converting the pointer signals to said score address signals, and means for switching the data port of the interface memory means whereby the score data stored therein may be read for transmission to the central computer.

Claim 58

An electronic tournament system comprising: (a) a plurality of electronic games of different types each including a display, a game data bus, a game address bus, a game memory for storing score data appearing on the data bus at addresses specified by data appearing on the address bus, and game processor means for controlling a game in which it is included, (b) an interface circuit associated with each game comprising: (i) interface memory means having address and data ports, (ii) an interface address bus connected between the address port and the game address bus, (iii) an interface data bus connected between the data port and the game data bus, whereby data stored in the game memory is similarly stored in the interface memory means, (iv) a communication port, (v) means for automatically reading the data stored in the interface memory means to obtain score data and for transmitting the score data to the communication port, (vi) a central processor for controlling said interface circuit, (c) a central computer including means for communication with the interface circuits via the communication port, for transmitting polling signals to the interface circuits and thereby initiating said transmission of score data for reception by the central computer, (d) each interface circuit further including (vii) a player identification code reader, (viii) means for transmitting a player identification code read by the code reader to the central computer, (ix) means for receiving a player code verification signal from the central computer and generating a game start signal, and for transmitting the game start signal to the associated electronic game whereby a player plays a score signal generating game on the electronic game, (x) an overlay memory for storage of pointer signals relating to score address of the interface memory means where score data for the associated electronic game are stored, means for reading the overlay memory and for converting the pointer signals to said score address signals, means for switching the address port of the interface memory means to receive said score address signals, comparator means connected to the interface data bus for detecting an "end of game" signal generated by the associated electronic game appearing on its data bus, and in response for signalling the central computer that the game has ended, whereby a data signal is transmitted to an associated central computer indicative thereof.

Claim 59

An electronic tournament system comprising: (a) a plurality of electronic games of different types each including a display, a game data bus, a game address bus, a game memory for storing score data appearing on the data bus at addresses specified by data appearing on the address bus, and game processor means for controlling a game in which it is included, (b) an interface circuit associated with each game comprising: (i) interface memory means having address and data ports, (ii) an interface address bus connected between the address port and the game address bus, (iii) an interface data bus connected between the data port and the game data bus, whereby data stored in the game memory is similarly stored in the interface memory means, (iv) a communication port, (v) means for automatically reading the data stored in the interface memory means to obtain score data and for transmitting the score data to the communication port, (vi) a central processor for controlling said interface circuit, (c) a central computer including means for communication with the interface circuits via the communication port, for transmitting polling signals to the interface circuits and thereby initiating said transmission of score data for reception by the central computer, (d) each interface circuit further including (vii) a player identification code reader, (viii) means for transmitting a player identification code read by the code reader to the central computer, (ix) means for receiving a player code verification signal from the central computer and generating a game start signal, and for transmitting the game start signal to the associated electronic game whereby a player plays a score signal generating game on the electronic game, (x) an overlay memory for storage of pointer signals relating to score address of the interface memory means where score data for the associated electronic game are stored, means for reading the overlay memory and for converting the pointer signals to said score address signals, means for switching the address port of the interface memory means to receive said score address signals, comparator means connected to the interface data bus for detecting an "end of game" signal generated by the associated electronic game appearing on its data bus, and in response for signalling the central computer that the game has ended, whereby a data signal is transmitted to an associated central computer indicative thereof.

Claim 60

An electronic tournament system comprising: (a) a plurality of electronic games of different types each including a display, a game data bus, a game address bus, a game memory for storing scored data appearing on the data bus at addresses specified by data appearing on the address bus, and game processor means for controlling a game in which it is included, (b) an interface circuit associated with each game comprising: (i) interface memory means having address and data ports, (ii) an interface address bus connected between the address port and the game address bus, (iii) an interface data bus connected between the data port and the game data bus, whereby data stored in the game memory is similarly stored in the interface memory means, (iv) a communication port, (v) means for automatically reading the data stored in the interface memory means to obtain score data and for transmitting the score data to the communication port, (vi) a central processor for controlling said interface circuit, (c) a central computer including means for communication with the interface circuits via the communication port, for transmitting polling signals to the interface circuits and thereby initiating said transmission of score data for reception by the central computer, each central computer further including means for storage of player identification codes and associated game credits, and for generating and transmitting a player code verification signal to a selected electronic game in the event of reception of a code from said selected electronic game which matches a stored player identification and the existence of a game credit associated therewith, (d) each interface circuit further including (vii) a player identification code reader, (viii) means for transmitting a player identification code read by the code reader to the associated central computer, (ix) means for receiving a player code vertification signal form the central computer and generating a game start signal, and for transmitting the game start signal to the associated electronic game whereby a player plays a score signal generating game on the electronic game, (x) an overlay memory for storage of pointer signals relating to score addresses of the interface memory means where score data for the associated electronic game are stored, means for reading the overlay memory and for converting the pointer signals to said score address signals, means for switching the address port of the interface memory means to receive said score address signals, comparator means connected to the interface data bus for detecting an "end of game" signal generated by the associated electronic game appearing on its data bus, and in response for signalling the central computer that a game has ended, whereby a data signal is transmitted to an associated central computer indicative thereof.

Claim 61

An electronic tournament system comprising: (a) a plurality of electronic games of different types each including a display, a game data bus, a game address bus, a game memory for storing scored data appearing on the data bus at addresses specified by data appearing on the address bus, and game processor means for controlling a game in which it is included, (b) an interface circuit associated with each game comprising: (i) interface memory means having address and data ports, (ii) an interface address bus connected between the address port and the game address bus, (iii) an interface data bus connected between the data port and the game data bus, whereby data stored in the game memory is similarly stored in the interface memory means, (iv) a communication port, (v) means for automatically reading the data stored in the interface memory means to obtain score data and for transmitting the score data to the communication port, (vi) a central processor for controlling said interface circuit, (c) a central computer including means for communication with the interface circuits via the communication port, for transmitting polling signals to the interface circuits and thereby initiating said transmission of score data for reception by the central computer, each central computer further including means for storage of player identification codes and associated game credits, and for generating and transmitting a player code verification signal to a selected electronic game in the event of reception of a code from said selected electronic game which matches a stored player identification and the existence of a game credit associated therewith, (d) each interface circuit further including (vii) a player identification code reader, (viii) means for transmitting a player identification code read by the code reader to the associated central computer, (ix) means for receiving a player code vertification signal form the central computer and generating a game start signal, and for transmitting the game start signal to the associated electronic game whereby a player plays a score signal generating game on the electronic game, (x) an overlay memory for storage of pointer signals relating to score addresses of the interface memory means where score data for the associated electronic game are stored, means for reading the overlay memory and for converting the pointer signals to said score address signals, means for switching the address port of the interface memory means to receive said score address signals, comparator means connected to the interface data bus for detecting an "end of game" signal generated by the associated electronic game appearing on its data bus, and in response for signalling the central computer that a game has ended, whereby a data signal is transmitted to an associated central computer indicative thereof.

Claim 62

An electronic tournament system comprising: (a) a plurality of electronic games of different types each including a display, a game data bus, a game address bus, a game memory for storing scored data appearing on the data bus at addresses specified by data appearing on the address bus, and game processor means for controlling a game in which it is included, (b) an interface circuit associated with each game comprising: (i) interface memory means having address and data ports, (ii) an interface address bus connected between the address port and the game address bus, (iii) an interface data bus connected between the data port and the game data bus, whereby data stored in the game memory is similarly stored in the interface memory means, (iv) a communication port, (v) means for automatically reading the data stored in the interface memory means to obtain score data and for transmitting the score data to the communication port, (vi) a central processor for controlling said interface circuit, (c) a central computer including means for communication with the interface circuits via the communication port, for transmitting polling signals to the interface circuits and thereby initiating said transmission of score data for reception by the central computer, (d) each interface circuit further including (vii) a player identification coder reader, (viii) means for transmitting a player identification code read by the code reader to the central computer, (ix) means for receiving a player code verification signal from the central computer and generating a game start signal, and for transmitting the game start signal to the associated electronic game whereby a player plays a score signal generating game on the electronic game, (x) an overlay memory for storage of pointer signals relating to score addresses of the interface means where score data for the associated electronic game are stored, means for reading the overlay memory and for converting the pointer signals to said score address signals, means for switching the address port of the interface memory means to receive said score address signals, comparator means connected to the interface data bus for detecting signals representative of an end of a game generated by the associated electronic game appearing on its data bus, and in response for signalling the central computer that a game has ended, whereby a data signal is transmitted to an associated central computer indicative thereof, means for switching the address and data ports to receive address and data signals for storage of the latter data signals in the interface memory means at addresses specified by the latter address signals, means for storage of said latter address and data signals, and means for switching the interface memory means data port to the game data bus to output said data signals thereon and thereby control operation of the electronic game.

Claim 63

An electronic tournament system comprising: (a) a plurality of electronic games of different types each including a display, a game data bus, a game address bus, a game memory for storing scored data appearing on the data bus at addresses specified by data appearing on the address bus, and game processor means for controlling a game in which it is included, (b) an interface circuit associated with each game comprising: (i) interface memory means having address and data ports, (ii) an interface address bus connected between the address port and the game address bus, (iii) an interface data bus connected between the data port and the game data bus, whereby data stored in the game memory is similarly stored in the interface memory means, (iv) a communication port, (v) means for automatically reading the data stored in the interface memory means to obtain score data and for transmitting the score data to the communication port, (vi) a central processor for controlling said interface circuit, (c) a central computer including means for communication with the interface circuits via the communication port, for transmitting polling signals to the interface circuits and thereby initiating said transmission of score data for reception by the central computer, (d) each interface circuit further including (vii) a player identification coder reader, (viii) means for transmitting a player identification code read by the code reader to the central computer, (ix) means for receiving a player code verification signal from the central computer and generating a game start signal, and for transmitting the game start signal to the associated electronic game whereby a player plays a score signal generating game on the electronic game, (x) an overlay memory for storage of pointer signals relating to score addresses of the interface means where score data for the associated electronic game are stored, means for reading the overlay memory and for converting the pointer signals to said score address signals, means for switching the address port of the interface memory means to receive said score address signals, comparator means connected to the interface data bus for detecting signals representative of an end of a game generated by the associated electronic game appearing on its data bus, and in response for signalling the central computer that a game has ended, whereby a data signal is transmitted to an associated central computer indicative thereof, means for switching the address and data ports to receive address and data signals for storage of the latter data signals in the interface memory means at addresses specified by the latter address signals, means for storage of said latter address and data signals, and means for switching the interface memory means data port to the game data bus to output said data signals thereon and thereby control operation of the electronic game.

Claim 64

An electronic tournament system comprising: (a) a plurality of electronic games of different types each including a display, a game data bus, a game address bus, a game memory for storing scored data appearing on the data bus at addresses specified by data appearing on the address bus, and game processor means for controlling operation of a game in which it is included, (b) an interface circuit associated with each game comprising: (i) interface memory means having address and data ports, (ii) an interface address bus connected between the address port and the game address bus, (iii) an interface data bus connected between the data port and the game data bus, whereby data stored in the game memory is similarly stored in the interface memory means, (iv) a communication port, (v) means for automatically reading the data stored in the interface memory means to obtain score data and for transmitting the score data to the communication port, (vi) a central processor for controlling said interface circuit, (c) a central computer including means for communication with the interface circuits via the communication port, for transmitting polling signals to the interface circuits and thereby initiating said transmission of score data for reception by the central computer, each central computer including means for storage of player identification codes and associated game credits, and for generating and transmitting a player code verification signal to a selected electronic game in the event of reception of a code from said selected electronic game which matches a stored player identification code and the existence of game credit associated therewith, each interface circuit further including (vii) a player identification coder reader, (viii) means for transmitting a player identification code read by the code reader to the associated central computer, (ix) means for receiving a player code verification signal from an associated central computer and generating a game start signal, and for transmitting the game start signal to the associated electronic game whereby a player plays a score signal generating game on the electronic game, (x) an overlay memory for storage of pointer signals relating to score addresses of the interface means where score data for the associated electronic game are stored, means for reading the overlay memory and for converting the pointer signals to said score address signals, means for switching the address port of the interface memory means to receive said score address signals, comparator means connected to the interface data bus for detecting signals representative of an end of a game generated by the associated electronic game appearing on its data bus, and in response for signalling the central computer that a game has ended, whereby a data signal is transmitted to the central computer indicative thereof, means for switching the address and data ports to receive address and data signals for storage of the latter data signals in the interface memory means at addresses specified by the latter address signals, means for storage of said latter address and data signals, and means for switching the interface memory means data port to the game data bus to output said data signals thereon and thereby control operation of the electronic game.

Claim 65

An electronic tournament system comprising: (a) a plurality of electronic games of different types each including a display, a game data bus, a game address bus, a game memory for storing scored data appearing on the data bus at addresses specified by data appearing on the address bus, and game processor means for controlling operation of a game in which it is included, (b) an interface circuit associated with each game comprising: (i) interface memory means having address and data ports, (ii) an interface address bus connected between the address port and the game address bus, (iii) an interface data bus connected between the data port and the game data bus, whereby data stored in the game memory is similarly stored in the interface memory means, (iv) a communication port, (v) means for automatically reading the data stored in the interface memory means to obtain score data and for transmitting the score data to the communication port, (vi) a central processor for controlling said interface circuit, (c) a central computer including means for communication with the interface circuits via the communication port, for transmitting polling signals to the interface circuits and thereby initiating said transmission of score data for reception by the central computer, each central computer including means for storage of player identification codes and associated game credits, and for generating and transmitting a player code verification signal to a selected electronic game in the event of reception of a code from said selected electronic game which matches a stored player identification code and the existence of game credit associated therewith, each interface circuit further including (vii) a player identification coder reader, (viii) means for transmitting a player identification code read by the code reader to the associated central computer, (ix) means for receiving a player code verification signal from an associated central computer and generating a game start signal, and for transmitting the game start signal to the associated electronic game whereby a player plays a score signal generating game on the electronic game, (x) an overlay memory for storage of pointer signals relating to score addresses of the interface means where score data for the associated electronic game are stored, means for reading the overlay memory and for converting the pointer signals to said score address signals, means for switching the address port of the interface memory means to receive said score address signals, comparator means connected to the interface data bus for detecting signals representative of an end of a game generated by the associated electronic game appearing on its data bus, and in response for signalling the central computer that a game has ended, whereby a data signal is transmitted to the central computer indicative thereof, means for switching the address and data ports to receive address and data signals for storage of the latter data signals in the interface memory means at addresses specified by the latter address signals, means for storage of said latter address and data signals, and means for switching the interface memory means data port to the game data bus to output said data signals thereon and thereby control operation of the electronic game.

Claim 66

An electronic tournament system comprising: (a) a plurality of electronic games of different types each including a display, a game data bus, a game address bus, a game memory for storing scored data appearing on the data bus at addresses specified by data appearing on the address bus, and game processor means for controlling operation of a game in which it is included, (b) an interface circuit associated with each game comprising: (i) interface memory means having address and data ports, (ii) an interface address bus connected between the address port and the game address bus, (iii) an interface data bus connected between the data port and the game data bus, whereby data stored in the game memory is similarly stored in the interface memory means, (iv) a communication port, (v) means for automatically reading the data stored in the interface memory means to obtain score data and for transmitting the score data to the communication port, (vi) a central processor for controlling said interface circuit, (c) a central computer including means for communication with the interface circuits via the communication port, for transmitting polling signals to the interface circuits and thereby initiating said transmission of score data for reception by the central computer each interface circuit further including (vii) a player identification code reader, (viii) means for transmitting a player identification code read by the code reader to the associated central computer, (ix) means for receiving a player code verification signal from an associated central computer and generating a game start signal, and for transmitting the game start signal to the associated electronic game whereby a player plays score signal generating game on the electronic game, (x) an overlay memory for storage of pointer signals relating to score addresses of the interface means where score data for the associated electronic game are stored, means for reading the overlay memory and for converting the pointer signals to said score address signals, means for switching the address port of the interface memory means to receive said score address signals, comparator means connected to the interface data bus for detecting signals representative of an end of a game generated by the associated electronic game appearing on its data bus, and in response for signalling the central computer that a game has ended, whereby a data signal is transmitted to the central computer indicative thereof, means for switching the address and data ports to receive address and data signals for storage of the latter data signals in the interface memory means at addresses specified by the latter address signals, means for storage of said latter address and data signals, and means for switching the interface memory means data port to the game data bus to output said data signals thereon and thereby control operation of the electronic game.

Claim 67

An electronic tournament system comprising: (a) a plurality of electronic games of different types each including a display, a game data bus, a game address bus, a game memory for storing scored data appearing on the data bus at addresses specified by data appearing on the address bus, and game processor means for controlling operation of a game in which it is included, (b) an interface circuit associated with each game comprising: (i) interface memory means having address and data ports, (ii) an interface address bus connected between the address port and the game address bus, (iii) an interface data bus connected between the data port and the game data bus, whereby data stored in the game memory is similarly stored in the interface memory means, (iv) a communication port, (v) means for automatically reading the data stored in the interface memory means to obtain score data and for transmitting the score data to the communication port, (vi) a central processor for controlling said interface circuit, (c) a central computer including means for communication with the interface circuits via the communication port, for transmitting polling signals to the interface circuits and thereby initiating said transmission of score data for reception by the central computer each interface circuit further including (vii) a player identification code reader, (viii) means for transmitting a player identification code read by the code reader to the associated central computer, (ix) means for receiving a player code verification signal from an associated central computer and generating a game start signal, and for transmitting the game start signal to the associated electronic game whereby a player plays score signal generating game on the electronic game, (x) an overlay memory for storage of pointer signals relating to score addresses of the interface means where score data for the associated electronic game are stored, means for reading the overlay memory and for converting the pointer signals to said score address signals, means for switching the address port of the interface memory means to receive said score address signals, comparator means connected to the interface data bus for detecting signals representative of an end of a game generated by the associated electronic game appearing on its data bus, and in response for signalling the central computer that a game has ended, whereby a data signal is transmitted to the central computer indicative thereof, means for switching the address and data ports to receive address and data signals for storage of the latter data signals in the interface memory means at addresses specified by the latter address signals, means for storage of said latter address and data signals, and means for switching the interface memory means data port to the game data bus to output said data signals thereon and thereby control operation of the electronic game.

Claim 68

An electronic tournament system comprising: (a) a plurality of electronic games of different types each including a display, a game data bus, a game address bus, a game memory for storing scored data appearing on the data bus at addresses specified by data appearing on the address bus, and game processor means for controlling operation of a game in which it is included, (b) an interface circuit associated with each game comprising: (i) interface memory means having address and data ports, (ii) an interface address bus connected between the address port and the game address bus, (iii) an interface data bus connected between the data port and the game data bus, whereby data stored in the game memory is similarly stored in the interface memory means, (iv) a communication port, (v) means for automatically reading the data stored in the interface memory means to obtain score data and for transmitting the score data to the communication port, (vi) a central processor for controlling said interface circuit, (c) a central computer including means for communication with the interface circuits via the communication port, for transmitting polling signals to the interface circuits and thereby initiating said transmission of score data for reception by the central computer, the central computer including means for storage of player identification codes and associated game credits, and for generating and transmitting a player code verification signal to a selected electronic game in the event of reception of a code from said selected electronic game which matches a stored player identification code and the existence of a game credit associated therewith each interface circuit further including (vii) a player identification coder reader, (viii) means for transmitting a player identification code read by the code reader to the associated central computer, (ix) means for receiving a player code verification signal from the central computer and generating a game start signal, and for transmitting the game start signal to the associated electronic game whereby a player plays a score signal generating game on the electronic game, (x) and overlay memory for storage of pointer signals relating to score addresses of the interface memory means where score data for the associated electronic game are stored, means for reading the overlay memory and for converting the pointer signals to said score address signals, means for switching the address port of the interface memory means to receive said score address signals, comparator means connected to the interface data bus for detecting signals representative of an end of a game, generated by the associated electronic game appearing on its data bus, and in response for signalling the central processor that a game has ended, whereby a data signal is transmitted to the central computer indicative thereof, means for switching the address and data ports to receive address and data signals for storage of the latter data signals in the interface memory means at addresses specified by the latter address signals, means for receiving at least said latter data signals from the central computer, means for storage of said latter address and data signals, and means for switching the interface memory means data port to the game data bus to output said data signals thereon and thereby control operation of the electronic game.

Claim 69

An electronic tournament system comprising: (a) a plurality of electronic games of different types each including a display, a game data bus, a game address bus, a game memory for storing scored data appearing on the data bus at addresses specified by data appearing on the address bus, and game processor means for controlling operation of a game in which it is included, (b) an interface circuit associated with each game comprising: (i) interface memory means having address and data ports, (ii) an interface address bus connected between the address port and the game address bus, (iii) an interface data bus connected between the data port and the game data bus, whereby data stored in the game memory is similarly stored in the interface memory means, (iv) a communication port, (v) means for automatically reading the data stored in the interface memory means to obtain score data and for transmitting the score data to the communication port, (vi) a central processor for controlling said interface circuit, (c) a central computer including means for communication with the interface circuits via the communication port, for transmitting polling signals to the interface circuits and thereby initiating said transmission of score data for reception by the central computer, the central computer including means for storage of player identification codes and associated game credits, and for generating and transmitting a player code verification signal to a selected electronic game in the event of reception of a code from said selected electronic game which matches a stored player identification code and the existence of a game credit associated therewith each interface circuit further including (vii) a player identification coder reader, (viii) means for transmitting a player identification code read by the code reader to the associated central computer, (ix) means for receiving a player code verification signal from the central computer and generating a game start signal, and for transmitting the game start signal to the associated electronic game whereby a player plays a score signal generating game on the electronic game, (x) and overlay memory for storage of pointer signals relating to score addresses of the interface memory means where score data for the associated electronic game are stored, means for reading the overlay memory and for converting the pointer signals to said score address signals, means for switching the address port of the interface memory means to receive said score address signals, comparator means connected to the interface data bus for detecting signals representative of an end of a game, generated by the associated electronic game appearing on its data bus, and in response for signalling the central processor that a game has ended, whereby a data signal is transmitted to the central computer indicative thereof, means for switching the address and data ports to receive address and data signals for storage of the latter data signals in the interface memory means at addresses specified by the latter address signals, means for receiving at least said latter data signals from the central computer, means for storage of said latter address and data signals, and means for switching the interface memory means data port to the game data bus to output said data signals thereon and thereby control operation of the electronic game.