Trimming code setting circuit having high reliability

Claim 1

A semiconductor integrated circuit comprising: a trimming code setting circuit so configured that a desired trimming code is set dependently upon whether or not a thin film resistor is cut, the trimming code setting circuit including first and second ratio circuits each of which includes a transistor having a main current path connected in series with a thin film resistor in such a manner that a series circuit composed of said thin film resistor and said main current path of said transistor is connected at its one end to a high voltage side and at its other end to a low voltage side, said transistor being biased to allow a predetermined current to flow through said series circuit composed of said thin film resistor and said main current path of said transistor, a connection node between said main current path of said transistor and said thin film resistor forming a voltage output node, and means connected to said voltage output node of each of said first and second ratio circuits for comparing a voltage on said voltage output node of said first ratio circuit with a voltage on said voltage output node of said second ratio circuit, said means operating to output a logical signal determined on the basis of whether or not said the voltage on said voltage output node of said first ratio circuit is higher than the voltage on said voltage output node of said second ratio circuit; a current setting circuit composed of a first MOS transistor having a main current path connected at its one end to a first high voltage supply terminal and at its other end through a constant current source to a first low voltage supply terminal, a gate of said first MOS transistor being connected to an end of said main current path of said first MOS transistor; and a current mirror circuit composed of a second MOS transistor having a gate connected to said gate of said first MOS transistor of said current setting circuit and having a main current path connected at its one end to a second high voltage supply terminal, and wherein said transistor of each of said first and second ratio circuits is as MOS transistor having a gate connected to receive a predetermined voltage, and said one end of said main current path of said transistor of each of said first and second ratio circuits is connected to the other end of said main current path of said second MOS transistor of said current mirror circuit.