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US5155576A Expired / Lapsed US ⏱️ 0.0 years remaining

Semiconductor integrated circuit having a multilayer wiring structure

Assignee: NEC Electronics Corp
•
Filing: 1991-03-27
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Granted: 1992-10-13
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Expires: 2011-03-27
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Abstract

Abstract A semiconductor integrated circuit is constituted, by forming selectively a first insulation film on a lower layer wiring metal; after covering a lateral wall of the lower layer wiring metal with a second insulation film, embedding a material having a low dielectric constant in the lower layer wiring so as to flatten the surface thereof. A third insulation film is formed over the entire surface, and through holes are made in the first and the third insulation films on the lower layer wiring so as to connect the lower layer wiring to the upper layer wiring through the through holes. Thus, it is possible to realize a layer insulation film having very good flatness, to realize a multilayer wiring having high reliability in which corrosions, etc., are not caused in the wiring metal containing through hole portions, and to make the coated films thicker, which films have a low dielectric constant and can be relatively easily formed, so that the wiring capacity can be decreased.

Inventors

  • 👤 Kazuyuki Mizushima

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-10-29 03:17
CPC Classifications
H; H10; H10W; H10W20/00; H10W20/40; H10W20/45; H10W20/48; H10W20/41; H10W20/42

Claims Analysis

Total Claims: 5
Claim 1
Independent Claim 183 words
A semiconductor integrated circuit comprising: (a) a lower layer wiring formed in a predetermined configuration on a semiconductor substrate on which semiconductor elements have been previously formed; (b) a first CVD insulation film formed on said lower layer wiring in the same configuration as said lower layer wiring; (c) a second CVD insulation film covering at least a lateral portion of said lower layer wiring; (d) a film having a low dielectric constant which is formed on the semiconductor subtrate in a region wherein neither the lower layer wiring nor the first CVD insulation film is formed and the surface level of the low dielectric film is substantially equal to the surface level of said first CVD insulation film; (e) a third CVD insulation film covering the entire surface above said first CVD insulation film and said low dielectric constant film; and (f) an upper layer wiring, formed on the third CVD insulating film, connected to said lower layer wiring through openings which are made, respectively in said first CVD insulation film and said third CVD insulation film on said lower layer wiring.
Claim 2
Dependent Claim 183 words
A semiconductor integrated circuit comprising: (a) a lower layer wiring formed in a predetermined configuration on a semiconductor substrate on which semiconductor elements have been previously formed; (b) a first CVD insulation film formed on said lower layer wiring in the same configuration as said lower layer wiring; (c) a second CVD insulation film covering at least a lateral portion of said lower layer wiring; (d) a film having a low dielectric constant which is formed on the semiconductor subtrate in a region wherein neither the lower layer wiring nor the first CVD insulation film is formed and the surface level of the low dielectric film is substantially equal to the surface level of said first CVD insulation film; (e) a third CVD insulation film covering the entire surface above said first CVD insulation film and said low dielectric constant film; and (f) an upper layer wiring, formed on the third CVD insulating film, connected to said lower layer wiring through openings which are made, respectively in said first CVD insulation film and said third CVD insulation film on said lower layer wiring.
Claim 3
Dependent Claim 48 words
The semiconductor integrated circuit according to claim 1, wherein said CVD insulation film is a silicon oxide film, a silicon nitride film or a silicon oxynitride film, and said film having a low dielectric constant is a silicon glass film, an organosilicon compound film or a polyimide film.
Claim 4
Dependent Claim 94 words
A semiconductor device comprising: a lower layer wiring having a predetermined configuration on a semiconductor substrate; a first insulation film on said lower layer wiring having the same said predetermined configuration; a second insulation film covering at least a lateral portion of said lower layer wiring; a low dielectric constant film on the semiconductor substrate in a region other than said lower layer wiring and said first insulation film; a third insulation film covering said first insulation film and said low dielectric constant film; and an upper layer wiring on said third insulating film.
Claim 5
Dependent Claim 94 words
A semiconductor device comprising: a lower layer wiring having a predetermined configuration on a semiconductor substrate; a first insulation film on said lower layer wiring having the same said predetermined configuration; a second insulation film covering at least a lateral portion of said lower layer wiring; a low dielectric constant film on the semiconductor substrate in a region other than said lower layer wiring and said first insulation film; a third insulation film covering said first insulation film and said low dielectric constant film; and an upper layer wiring on said third insulating film.

References Cited (Backward Citations)

US4040083A Cited
US4204894A Cited
US4561009A Cited
JPS57100748A Cited
JPS58124426A Cited
JPS62295437A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1995-10-13 1996-04-13 1996-10-13 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1999-10-13 2000-04-13 2000-10-13 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 2003-10-13 2004-04-13 2004-10-13 $7700.00 Window Closed / Lapsed

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